[081/205] ARM: 6205/1: perf: ensure counter delta is treated as unsigned
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From: Greg KH on 30 Jul 2010 14:30 2.6.34-stable review patch. If anyone has any objections, please let us know. ------------------ From: Will Deacon <will.deacon(a)arm.com> commit 446a5a8b1eb91a6990e5c8fe29f14e7a95b69132 upstream. Hardware performance counters on ARM are 32-bits wide but atomic64_t variables are used to represent counter data in the hw_perf_event structure. The armpmu_event_update function right-shifts a signed 64-bit delta variable and adds the result to the event count. This can lead to shifting in sign-bits if the MSB of the 32-bit counter value is set. This results in perf output such as: Performance counter stats for 'sleep 20': 18446744073460670464 cycles <-- 0xFFFFFFFFF12A6000 7783773 instructions # 0.000 IPC 465 context-switches 161 page-faults 1172393 branches 20.154242147 seconds time elapsed This patch ensures that the delta value is treated as unsigned so that the right shift sets the upper bits to zero. Acked-by: Jamie Iles <jamie.iles(a)picochip.com> Signed-off-by: Will Deacon <will.deacon(a)arm.com> Signed-off-by: Russell King <rmk+kernel(a)arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh(a)suse.de> --- arch/arm/kernel/perf_event.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -165,7 +165,7 @@ armpmu_event_update(struct perf_event *e { int shift = 64 - 32; s64 prev_raw_count, new_raw_count; - s64 delta; + u64 delta; again: prev_raw_count = atomic64_read(&hwc->prev_count); -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ |