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From: Bill on 13 Sep 2009 08:33
On Sun, 13 Sep 2009 01:05:07 +0200, Ulf Samuelsson <ulf(a)atmel.com>
wrote:

>An idea:
>
>Run a timer which is connected to the SSC input clock and ADC clock.
>It also clocks another timer in PWM mode generating
>the ADC chip select.
>
>The ADC will see 22 active and 10 passive bits
>and the SSC will see 32 bits.
>
>(Did not test this)

Hey, that's a wonderful idea!!
It opens up a broad array of new possibilities :-)

Thanks!
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