3 phase from func.gen. IC
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From: John Fields on 11 Mar 2010 19:23 On Wed, 10 Mar 2010 19:33:19 -0500, Jamie <jamie_ka1lpa_not_valid_after_ka1lpa_(a)charter.net> wrote: >Kevin Lang wrote: > >> What would be the simplest way to derive a simultaneous three phase >> output from a sine wave produced by a single function generator IC ... >> that does not change as the frequency is varied? >> >> Specifically, two additional sinewaves remaining 120 and 240 degrees >> out of phase with the original as the frequency is varied between >> 100Hz and 1KHz. >> >> Kevin Lang > Learn to code a uC chip... A Pic, AVR, ATEML, ARm etc.. >that has at least 3 ADC outputs.. > The smaller family chips use a PWM (Pulse width modulator) that >can form a Sin wave on the output.. > > You code the math to generate the first base sine and then, offset >the other outputs at the proper angle. --- And how, exactly, would you do that over a 10:1 change in frequency? JF
From: Jamie on 11 Mar 2010 19:50 Michael A. Terrell wrote: > Jamie wrote: > >>Michael A. Terrell wrote: >> >> >>>JW wrote: >>> >>> >>>>On Wed, 10 Mar 2010 19:33:19 -0500 Jamie >>>><jamie_ka1lpa_not_valid_after_ka1lpa_(a)charter.net> wrote in Message id: >>>><0AWln.78156$K81.64778(a)newsfe18.iad>: >>>> >>>> >>>> >>>>>Learn to code a uC chip... A Pic, AVR, ATEML, ARm etc.. >>>>>that has at least 3 ADC outputs.. >>>> >>>>ADC outputs? Do you mean DAC? >>> >>> >>> >>> He never knows what he means. >>> >>> >> >> I think you should be the last one, commenting on that. > > > > When did you start thinking? > > I've always been thinking. The mentally incapacitated, usually don't notice. Don't fret, it'll probably take you a while to get this.
From: Jamie on 11 Mar 2010 21:03 John Fields wrote: > On Wed, 10 Mar 2010 19:33:19 -0500, Jamie > <jamie_ka1lpa_not_valid_after_ka1lpa_(a)charter.net> wrote: > > >>Kevin Lang wrote: >> >> >>>What would be the simplest way to derive a simultaneous three phase >>>output from a sine wave produced by a single function generator IC ... >>>that does not change as the frequency is varied? >>> >>>Specifically, two additional sinewaves remaining 120 and 240 degrees >>>out of phase with the original as the frequency is varied between >>>100Hz and 1KHz. >>> >>>Kevin Lang >> >> Learn to code a uC chip... A Pic, AVR, ATEML, ARm etc.. >>that has at least 3 ADC outputs.. >> The smaller family chips use a PWM (Pulse width modulator) that >>can form a Sin wave on the output.. >> >> You code the math to generate the first base sine and then, offset >>the other outputs at the proper angle. > > > --- > And how, exactly, would you do that over a 10:1 change in frequency? > > JF Never made a variable frequency generator with a uC before? it's very easy. Look at DDS technology. Just an old idea with a new name on it and some alterations to make it possible for a wide range of output. With 20 Mhz uC's you can get 1khz sine waves via pwm with no problem into a padded network that is unity buffered. Even the slower ones can do that. Math isn't a problem, I just load a data table with the integral coefficients to index into, for fast computations of the PWM duty cycle. And I have made a 3 phase 60 Hz reference generator with a PLL that did a 12 cycle latency sample. This was to replace an obsolete chip. (via an older generation PIC). The output wave form looked clean.... btw, there are some external components needed to polish this off, naturally. And if memory serves, I think microchip has newer uC's that makes this even easier now. Have a good day..
From: JosephKK on 12 Mar 2010 09:47 On Wed, 10 Mar 2010 21:58:36 -0800, Robert Baer <robertbaer(a)localnet.com> wrote: >Kevin Lang wrote: >> What would be the simplest way to derive a simultaneous three phase >> output from a sine wave produced by a single function generator IC ... >> that does not change as the frequency is varied? >> >> Specifically, two additional sinewaves remaining 120 and 240 degrees >> out of phase with the original as the frequency is varied between >> 100Hz and 1KHz. >> >> Kevin Lang > Refer to analog computers and work done then (40 or so years ago well >before "solid state"). > Even the x=-x.. generator needs tuning for sine generation, so what >is wrong with using three phase retard stages with "ganged" tuning to >maintain fixed phase delay on each stage? Nothing at all. However average engineers find it difficult to maintain proper phase relationships and maintain stable amplitude versus frequency.
From: Michael A. Terrell on 12 Mar 2010 18:53
Jamie wrote: > > Michael A. Terrell wrote: > > > Jamie wrote: > > > >>Michael A. Terrell wrote: > >> > >> > >>>JW wrote: > >>> > >>> > >>>>On Wed, 10 Mar 2010 19:33:19 -0500 Jamie > >>>><jamie_ka1lpa_not_valid_after_ka1lpa_(a)charter.net> wrote in Message id: > >>>><0AWln.78156$K81.64778(a)newsfe18.iad>: > >>>> > >>>> > >>>> > >>>>>Learn to code a uC chip... A Pic, AVR, ATEML, ARm etc.. > >>>>>that has at least 3 ADC outputs.. > >>>> > >>>>ADC outputs? Do you mean DAC? > >>> > >>> > >>> > >>> He never knows what he means. > >>> > >>> > >> > >> I think you should be the last one, commenting on that. > > > > > > > > When did you start thinking? > > > > > I've always been thinking. The mentally incapacitated, usually don't notice. > > Don't fret, it'll probably take you a while to get this. Yawn. You're as stupid as dimbulb. You'll never get that. -- Lead free solder is Belgium's version of 'Hold my beer and watch this!' |