From: nappy on

"Paul Carpenter" <paul$@pcserviceselectronics.co.uk> wrote in message
news:20070213.1006.325691snz(a)pcserviceselectronics.co.uk...
> On Monday, in article
> <7y7Ah.5884$o61.2906(a)newssvr19.news.prodigy.net>
> spam(a)spam.com "nappy" wrote:
>
>>"Paul Carpenter" <paul$@pcserviceselectronics.co.uk> wrote in message
>>news:20070212.1921.325648snz(a)pcserviceselectronics.co.uk...
>>>
>>> What type of DVI interface are you going to do
>>> Analog
>>
>>What is an analog DVI interface? :)
>
> That would be 'funny' if you were right but you are wrong as analog DVI
> interface for monitors exists. I suggest you read up on the matter as
> that is refered to as DVI-A connections.

Yes.. but those are not DVI connections.. that's just (analog) VGA
piggybacked on the DVI connector. There is NO analog digital video
interface.


From: nappy on

"nappy" <spam(a)spam.com> wrote in message
news:sY6Bh.10747$gj4.5626(a)newssvr14.news.prodigy.net...
>
> "Paul Carpenter" <paul$@pcserviceselectronics.co.uk> wrote in message
> news:20070213.1006.325691snz(a)pcserviceselectronics.co.uk...
>> On Monday, in article
>> <7y7Ah.5884$o61.2906(a)newssvr19.news.prodigy.net>
>> spam(a)spam.com "nappy" wrote:
>>
>>>"Paul Carpenter" <paul$@pcserviceselectronics.co.uk> wrote in message
>>>news:20070212.1921.325648snz(a)pcserviceselectronics.co.uk...
>>>>
>>>> What type of DVI interface are you going to do
>>>> Analog
>>>
>>>What is an analog DVI interface? :)
>>
>> That would be 'funny' if you were right but you are wrong as analog DVI
>> interface for monitors exists. I suggest you read up on the matter as
>> that is refered to as DVI-A connections.
>
> Yes.. but those are not DVI connections.. that's just (analog) VGA
> piggybacked on the DVI connector. There is NO analog digital video
> interface.

FWIW I am a display developer. NTSC, VGA, DVI, 343, 170 etc...
>
>


From: Guy Macon on



nappy wrote:

>FWIW I am a display developer. NTSC, VGA, DVI, 343, 170 etc...

Just the person I was looking for!

In order to create a valid DVI signal that is:

1024 x 768 pixels

8 bits per color per pixel

60 Hz. refresh rate

Generated from the data lines of a SRAM

....that said SRAM has it's address lines incremented by
a counter (assume RD. WR. CS, etc are all taken care of
properly).

....and that said counter can be reset to zero at any
point you choose (not just powers of 2)


....



What frequency should the counter run at?

How many RAM addresses does it need to access?

How many bits wide should the RAM be?

At what number of bits should the counter be reset
in order to start the next frame?

Hint: A single DVI link consists of four twisted pairs
(red, green, blue, and clock) to transmit 8 bits for
each 3 colors per pixel. All you need to do is add them up
and then figure out how much, if any time is spent blanking
and retrcacing. This should be a simple task for a display
developer.

>There is NO analog digital video interface.

In front of me is a catalog that lists the following connectors:

DVI-A
One set of eight pins and one set of four
pins plush four contacts around the blade

DVI-D Single Link
Two sets of nine pins with no contacts
around the blade

DVI-D Dual Link
One set of 24 pins with no contacts around
the blade

DVI-I Single Link
Two sets of nine pins plus four contacts
around the blade

DVI-I Dual Link
One set of 24 pins plus four contacts around
the blade

Tell me, what does the "A" in "DVI-A" stand for?


Guy Macon
<http://www.guymacon.com/>

From: Guy Macon on



More info from my looking into this (I have the flu, so
forgive me if this is disjointed and/or wrong...):

http://www.playtool.com/pages/dvicompat/dvi.html
gives these figures:

1024 X 768 @ 60 Hz = 65 MHz Pixel clock.

http://www.interfacebus.com/Design_Connector_Digital_Visual_Interface_DVI_Bus.html
Gives me the following DVI-D pinout:

1 TMDS Data2-
2 TMDS Data2+
3 TMDS Data2/4 Shield

6 DDC Clock [SCL]
7 DDC Data [SDA]
8 Analog vertical sync

9 TMDS Data1-
10 TMDS Data1+
11 TMDS Data1/3 Shield

14 +5 V Power
15 Ground
16 Hot Plug Detect

17 TMDS Data0-
18 TMDSData0+
19 TMDS Data0/5 Shield

22 TMDS Clock Shield
23 TMDS Clock +
24 TMDS Clock -

4, 5, 12, 13, 20, 21 not used

DDC = Display Data Channel
TMDS.= Transition Minimized Differential Signal

http://www.ddwg.org/lib/dvi_10.pdf (page 25 or so)
talks about TMDS encoding. My next step is to get a
good enough understanding of TMDS encoding to determine
whether I can pre-encode before storing to SRAM or
whether I need a post-SRAM hardware encoder. Or
whether to give up and stick with VGA.

Guy Macon
<http://www.guymacon.com/>


From: Jim Granville on
Guy Macon wrote:
> nappy wrote:
>
>
>>FWIW I am a display developer. NTSC, VGA, DVI, 343, 170 etc...
>
>
> Just the person I was looking for!
>
> In order to create a valid DVI signal that is:
>
> 1024 x 768 pixels
>
> 8 bits per color per pixel
>
> 60 Hz. refresh rate
>
> Generated from the data lines of a SRAM
>
> ...that said SRAM has it's address lines incremented by
> a counter (assume RD. WR. CS, etc are all taken care of
> properly).
>
> ...and that said counter can be reset to zero at any
> point you choose (not just powers of 2)
>
>
> ...
>
>
>
> What frequency should the counter run at?
>
> How many RAM addresses does it need to access?
>
> How many bits wide should the RAM be?
>
> At what number of bits should the counter be reset
> in order to start the next frame?
>
> Hint: A single DVI link consists of four twisted pairs
> (red, green, blue, and clock) to transmit 8 bits for
> each 3 colors per pixel. All you need to do is add them up
> and then figure out how much, if any time is spent blanking
> and retrcacing. This should be a simple task for a display
> developer.

You can get some easy ball-park numbers :
- assume no dead-time, and you get 60*768*1024 = ~47MHz (call that 50MHz).
Ram width is up to you - 24bits wide = Pixel clock, 8 bits = 3x pixel
clock. Plus you need to serialise if this is LVDS, so to serialise 8
bits digital onto 1 pair, is > 8x pixel clock = 2.5ns data slices

So to keep this sensible, you'd probably need x24 SRAM, and commercial
SerDes encoder.


Check a recent device like
http://www.fairchildsemi.com/ds/FI/FIN324C.pdf
targets links to LCDs in cellphones,
(Wider fanin, but lower Fin than above numbers), has link clock of ~275MHz

-jg