A naive conjecture about computer architecture and artificial intelligence
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From: jacko on 6 Jul 2010 19:35 CALL REG+CONST Umm ... CALL REG<<CONST1+CONST2 Umm ... CALL REG -> JUMP CONSTINREG (^NUMCLASSES) Umm ... CALL REG -> JUMPINDIECT ENUMCONSTINREG (^NUMCLASSES) => ADR (^(NUMMETHODS * NUMCLASSES)) Just wondering? Cheers Jacko
From: Andy 'Krazy' Glew on 6 Jul 2010 19:44 On 7/6/2010 4:35 PM, jacko wrote: > CALL REG+CONST > > Umm ... CALL REG<<CONST1+CONST2 > > Umm ... CALL REG -> JUMP CONSTINREG (^NUMCLASSES) > > Umm ... CALL REG -> JUMPINDIECT ENUMCONSTINREG (^NUMCLASSES) => ADR > (^(NUMMETHODS * NUMCLASSES)) > > Just wondering? > > Cheers Jacko If you want to have a conversation, you will need to write English. Although I can guess what you are talking about, there are sufficient ambiguities that I could be assuming that you are talking about something completely different than you intend.
From: Andy 'Krazy' Glew on 6 Jul 2010 20:06 On 7/6/2010 4:44 PM, Andy 'Krazy' Glew wrote: > On 7/6/2010 4:35 PM, jacko wrote: >> CALL REG+CONST >> >> Umm ... CALL REG<<CONST1+CONST2 >> >> Umm ... CALL REG -> JUMP CONSTINREG (^NUMCLASSES) >> >> Umm ... CALL REG -> JUMPINDIECT ENUMCONSTINREG (^NUMCLASSES) => ADR >> (^(NUMMETHODS * NUMCLASSES)) >> >> Just wondering? >> >> Cheers Jacko > > > If you want to have a conversation, you will need to write English. > > Although I can guess what you are talking about, there are sufficient > ambiguities that I could be assuming that you are talking about > something completely different than you intend. Aww, heck: I'm on vacation, so I can afford to waste the time guessing >> CALL REG+CONST The usual primitive. Some machine, e.g. the AMD 29K, were even simpler, lacjomg eventhe ability to add in a constant. But that is usually a lossage, since vtables => small offsets from a register containing either the object or the vtable address >> Umm ... CALL REG<<CONST1+CONST2 Of minor value. Sure, the REG might be aligned - but on what boundary? 8 bytes? 64 bytes? The existing x86 memory addressing modes have shift counts of <<0(*1), <<1(*2), <<2(*4), <<3(*8). But probably none of these is really useful for CALL targets. You want truly two constants, CONST1 and CONST2? CONST1 => scaling *1, *8, *16, *32, *64, *4K ... Ugh. Basically, you would need CONST1 as a tightly enncoded 3 bit field, or a not-very-encoded byte, ad then you would need CONST2. How many flavors of CONST2? I mean, you are basicallly creating a custom instruction format for CALLs. CALLs are important, but are they THAT important? >> Umm ... CALL REG -> JUMP CONSTINREG (^NUMCLASSES) Unclear what you mean. Converting a CALL to a JMP - bad idea. Need the hint bits for return predictor. What does CONSTINREG mean? And how can hardware distinh=guish fromn a non-constinreg? ^ - I assume not XOR. Nor exponentiation. I think you are talking about how many different codesites would be required. >> Umm ... CALL REG -> JUMPINDIECT ENUMCONSTINREG (^NUMCLASSES) => ADR >> (^(NUMMETHODS * NUMCLASSES)) More precisely SUM over all classes c OF number of method in class c. And your point is? Scaling of predictor structures? Code size?
From: jacko on 6 Jul 2010 20:32 On 7 July, 01:06, Andy 'Krazy' Glew <ag-n...(a)patten-glew.net> wrote: > On 7/6/2010 4:44 PM, Andy 'Krazy' Glew wrote: > > > > > > > On 7/6/2010 4:35 PM, jacko wrote: > >> CALL REG+CONST > > >> Umm ... CALL REG<<CONST1+CONST2 > > >> Umm ... CALL REG -> JUMP CONSTINREG (^NUMCLASSES) > > >> Umm ... CALL REG -> JUMPINDIECT ENUMCONSTINREG (^NUMCLASSES) => ADR > >> (^(NUMMETHODS * NUMCLASSES)) > > >> Just wondering? > > >> Cheers Jacko > > > If you want to have a conversation, you will need to write English. > > > Although I can guess what you are talking about, there are sufficient > > ambiguities that I could be assuming that you are talking about > > something completely different than you intend. > > Aww, heck: I'm on vacation, so I can afford to waste the time guessing > > >> CALL REG+CONST > > The usual primitive. Some machine, e.g. the AMD 29K, were even simpler, lacjomg eventhe ability to add in a constant. > But that is usually a lossage, since vtables => small offsets from a register containing either the object or the > vtable address > > >> Umm ... CALL REG<<CONST1+CONST2 > > Of minor value. Sure, the REG might be aligned - but on what boundary? 8 bytes? 64 bytes? The existing x86 memory > addressing modes have shift counts of <<0(*1), <<1(*2), <<2(*4), <<3(*8). But probably none of these is really useful > for CALL targets. > > You want truly two constants, CONST1 and CONST2? CONST1 => scaling *1, *8, *16, *32, *64, *4K ... > > Ugh. Basically, you would need CONST1 as a tightly enncoded 3 bit field, or a not-very-encoded byte, ad then you would > need CONST2. How many flavors of CONST2? > > I mean, you are basicallly creating a custom instruction format for CALLs.. CALLs are important, but are they THAT > important? something like push method offset, push class id, return > >> Umm ... CALL REG -> JUMP CONSTINREG (^NUMCLASSES) > > Unclear what you mean. > > Converting a CALL to a JMP - bad idea. Need the hint bits for return predictor. > > What does CONSTINREG mean? And how can hardware distinh=guish fromn a non-constinreg? Something like call the class, class jumps indirect based on a method number in a register which is a constant. Because a constant is a new load, and not a unfilled by the alu speculative register. > ^ - I assume not XOR. Nor exponentiation. Each class would have one, so maybe it should have been *. > I think you are talking about how many different codesites would be required. > > >> Umm ... CALL REG -> JUMPINDIECT ENUMCONSTINREG (^NUMCLASSES) => ADR > >> (^(NUMMETHODS * NUMCLASSES)) The last point is that well its a potential big structure to maybe use method numbers rather than offset addresses. Ofset addresses would mean overidden methods would need to be the same size or smaller, and waste memory on alignment. The jump indirect would be a jump PC+constreg but as the class would possibly be changing on an overidden method, the call should not include the +offset, this can be done in the jump indirect pc +offsetinreg, which being a loaded constant and a know register at any speculative instruction stream. Cheers Jacko
From: jacko on 6 Jul 2010 20:49
JMP (PC+(SP++)) Is this an instruction worth having? SP is return stack pointer, for forth people this would be RP. |