A question regarding probe point on high speed digital circuits
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From: Javad Benhangi on 16 Jun 2010 16:24 Hi all, I have a question regarding probe point on high speed digital circuits. Im working with a chip that has 16 bit LVDS parallel data bus (including the clock that is LVDS). Im looking for a way to observe the 34 data signal and find the exact cause of not working the circuit. Im designing the board and Im looking for the best way to implement some test/probe point on the high speed signals. Of course some exposed tracks/VIAs is not enough to observe them because the need for proper termination. Since the number of signals is too much (34 signals) and sounds impossible to have an SMA connection point for each of them. If I use conventional oscilloscope probes adds too much noise. So what is the best way to observe such kind of signals? Since the signaling is differential is there a way to observe the signals using no differential probes?
From: Bill Sloman on 16 Jun 2010 21:29 On Jun 16, 10:24 pm, Javad Benhangi <benhan...(a)gmail.com> wrote: > Hi all, > I have a question regarding probe point on high speed digital > circuits. Im working with a chip that has 16 bit LVDS parallel data > bus (including the clock that is LVDS). Im looking for a way to > observe the 34 data signal and find the exact cause of not working the > circuit. > Im designing the board and Im looking for the best way to implement > some test/probe point on the high speed signals. Of course some > exposed tracks/VIAs is not enough to observe them because the need for > proper termination. Since the number of signals is too much (34 > signals) and sounds impossible to have an SMA connection point for > each of them. If I use conventional oscilloscope probes adds too much > noise. > So what is the best way to observe such kind of signals? > Since the signaling is differential is there a way to observe the > signals using no differential probes? When I wanted to probe a high speed signal, I put in a test point that was buffered by an emitter follower - using 5GHz broad-band transistors (BFR92, BFT92 or the like). You needed a base stopper - around 33R - in series with the base, as well as the resistor in series with the emitter, so it did take up board space, but you can probe such a buffered test point with a scope probe without messing up the transmission line carrying the signal itself. -- Bill Sloman, Nijmegen
From: John Larkin on 16 Jun 2010 21:52 On Wed, 16 Jun 2010 13:24:58 -0700 (PDT), Javad Benhangi <benhangi0(a)gmail.com> wrote: >Hi all, >I have a question regarding probe point on high speed digital >circuits. I�m working with a chip that has 16 bit LVDS parallel data >bus (including the clock that is LVDS). I�m looking for a way to >observe the 34 data signal and find the exact cause of not working the >circuit. >I�m designing the board and I�m looking for the best way to implement >some test/probe point on the high speed signals. Of course some >exposed tracks/VIAs is not enough to observe them because the need for >proper termination. Since the number of signals is too much (34 >signals) and sounds impossible to have an SMA connection point for >each of them. If I use conventional oscilloscope probes adds too much >noise. >So what is the best way to observe such kind of signals? >Since the signaling is differential is there a way to observe the >signals using no differential probes? We sometimes add a "Mictor" connector to our boards in a wide, nasty signal path, like between an FPGA and some complex chip like a PCI Express bridge. Then you can plug one of those cute little USB logic analyzer heads right into it. What I don't know is if there are any good LVDS logic analyzers. TYCO AMP 2-5767004-2 38 PINS is one we use. John
From: Joerg on 16 Jun 2010 23:39 Bill Sloman wrote: > On Jun 16, 10:24 pm, Javad Benhangi <benhan...(a)gmail.com> wrote: >> Hi all, >> I have a question regarding probe point on high speed digital >> circuits. I�m working with a chip that has 16 bit LVDS parallel data >> bus (including the clock that is LVDS). I�m looking for a way to >> observe the 34 data signal and find the exact cause of not working the >> circuit. >> I�m designing the board and I�m looking for the best way to implement >> some test/probe point on the high speed signals. Of course some >> exposed tracks/VIAs is not enough to observe them because the need for >> proper termination. Since the number of signals is too much (34 >> signals) and sounds impossible to have an SMA connection point for >> each of them. If I use conventional oscilloscope probes adds too much >> noise. >> So what is the best way to observe such kind of signals? >> Since the signaling is differential is there a way to observe the >> signals using no differential probes? > I can only see your posts when someone answers because you are posting via Google. Anyhow, you can use any connector you like and that is small enough, then come off with coax or at least twisted pair where one wire is always grounded. 3M used to make "coax ribbon". But most important is to provide 1k SMT resistors from the connector to your signal tap-off points. With 50ohm coaxes this results in a roughly 20:1 voltage divider because you must terminate the coax properly. Twisted pair would be around 100ohms. > When I wanted to probe a high speed signal, I put in a test point that > was buffered by an emitter follower - using 5GHz broad-band > transistors (BFR92, BFT92 or the like). You needed a base stopper - > around 33R - in series with the base, as well as the resistor in > series with the emitter, so it did take up board space, but you can > probe such a buffered test point with a scope probe without messing > up the transmission line carrying the signal itself. > Good idea. I also used that in reverse, for clock distribution. The RF transistor would make sure that the clock distribution line was loaded ever so slightly at each tap. The register or whatever needed to be clocked was connected to the emitter. For Javad it probably won't work because that's three parts per line. Unless he's willing to solder 0402 and SC75 packages. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: Bill Sloman on 17 Jun 2010 13:32
On Jun 17, 5:39 am, Joerg <inva...(a)invalid.invalid> wrote: > Bill Slomanwrote: > > On Jun 16, 10:24 pm, Javad Benhangi <benhan...(a)gmail.com> wrote: > >> Hi all, > >> I have a question regarding probe point on high speed digital > >> circuits. Im working with a chip that has 16 bit LVDS parallel data > >> bus (including the clock that is LVDS). Im looking for a way to > >> observe the 34 data signal and find the exact cause of not working the > >> circuit. > >> Im designing the board and Im looking for the best way to implement > >> some test/probe point on the high speed signals. Of course some > >> exposed tracks/VIAs is not enough to observe them because the need for > >> proper termination. Since the number of signals is too much (34 > >> signals) and sounds impossible to have an SMA connection point for > >> each of them. If I use conventional oscilloscope probes adds too much > >> noise. > >> So what is the best way to observe such kind of signals? > >> Since the signaling is differential is there a way to observe the > >> signals using no differential probes? > > I can only see your posts when someone answers because you are posting > via Google. Anyhow, you can use any connector you like and that is small > enough, then come off with coax or at least twisted pair where one wire > is always grounded. 3M used to make "coax ribbon". But most important is > to provide 1k SMT resistors from the connector to your signal tap-off > points. With 50ohm coaxes this results in a roughly 20:1 voltage divider > because you must terminate the coax properly. Twisted pair would be > around 100ohms. > > > When I wanted to probe a high speed signal, I put in a test point that > > was buffered by an emitter follower - using 5GHz broad-band > > transistors (BFR92, BFT92 or the like). You needed a base stopper - > > around 33R - in series with the base, as well as the resistor in > > series with the emitter, so it did take up board space, but you can > > probe such a buffered test point with a scope probe without messing > > up the transmission line carrying the signal itself. > > Good idea. I also used that in reverse, for clock distribution. The RF > transistor would make sure that the clock distribution line was loaded > ever so slightly at each tap. The register or whatever needed to be > clocked was connected to the emitter. > > For Javad it probably won't work because that's three parts per line. > Unless he's willing to solder 0402 and SC75 packages. I did mention that it was a bit space hungry. He may not need to monitor every track in his bus: monitoring one will tell him if the bus is working, and monitoring two would give him some idea of the spread on the propagation delays and edge speed. Since the buffer presents a largely capacitative load to the line, you can compensate for it by narrwoing the trace - say from 50R to 75R - for a cm or two around the buffer connection. -- Bill Sloman, Nijmegen |