AM digital demodulation methods
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From: Jerry Avins on 24 Apr 2010 08:39 On 4/23/2010 5:56 PM, Vladimir Vassilevsky wrote: > > > Jerry Avins wrote: > >> On 4/23/2010 5:33 PM, HardySpicer wrote: >> >>> On Apr 24, 8:24 am, Vladimir Vassilevsky<nos...(a)nowhere.com> wrote: >>> >>>> HardySpicer wrote: >>>> >>>>> Synchronous demodulation using a PLL will give you 3dB improvement >>>>> over ordinary envelope detection. >>>> >>>> >>>> This is wrong. >>>> >>> It's in the textbooks...read it! >> >> >> What is ordinary envelope detection? Peak detection? > > Doesn't matter; It is very simple. Think of |I| vs sqrt(I^2 + Q^2) Still, when someone claims "3dB improvement", I want to know what is improved upon. Jerry -- "I view the progress of science as ... the slow erosion of the tendency to dichotomize." --Barbara Smuts, U. Mich. �����������������������������������������������������������������������
From: Jerry Avins on 24 Apr 2010 08:50 On 4/23/2010 8:27 PM, glen herrmannsfeldt wrote: > Jerry Avins<jya(a)ieee.org> wrote: > (snip) > >> Rarely is a carrier to be demodulated sampled at more than twice the >> carrier frequency; that would be a waste. The sampling theorem tells us >> that we have to sample more than twice the frequency corresponding to >> the bandwidth of interest. There are some practical restrictions (the >> second edition of Understanding Digital Signal Processing by Rick Lyons >> has an excellent analysis of them) but in general, sampling 20 KHz wide >> signal on a 356 KHz carrier can be accomplished with a 50 KHz sample >> rate. A bandpass filter assures that the AM signal is not contaminated >> by adjacent channels. > > OK, but say one wants to minimize the analog circuitry, and fast > digital circuitry is available, including a fast ADC. That would > seem to go against the analog bandpass filter, but a lot of digital > filtering after the ADC could be provided. I'll rephrase this: >> With bandpass sampling, we need to exclude signals >> both above and below the band being sampled. Even if the signal were >> sampled at 1 MHz, a low-pass filter would be needed to substantially >> eliminate all signals above 500 KHz. With baseband sampling, we need an anti-alias lowpass filter. With bandpass sampling, we need an anti-alias bandpass filter. > But 1MHz is pretty slow for an ADC by now, isn't it? Sure, but needing all those samples means that you need the MIPS (and the watts) to process them. Why do that? >> Incidentally, sampling at 1 MHz provides a little over 2 samples per >> carrier cycle, with little chance that either of them will be near a >> carrier peak and hence representative of the envelope. With bandpass >> sampling at 50 KHz, there will be only one sample for every 9 or so >> carrier cycles. There is then no hope of peak detection. > > Even a small FPGA should allow for a lot of digital filtering > that can run at 100MHz or so. I think the trade-offs between analog and digital selectivity keep changing as technology advances. What sample rate would be needed to digitize the whole AM band? Should we build receivers that way? Jerry -- "I view the progress of science as ... the slow erosion of the tendency to dichotomize." --Barbara Smuts, U. Mich. �����������������������������������������������������������������������
From: Frnak McKenney on 24 Apr 2010 12:17 On Fri, 23 Apr 2010 16:03:32 -0500, gretzteam <gretzteam(a)n_o_s_p_a_m.yahoo.com> wrote: >> >> >>How does the average value of samples of the carrier relate to the >>approximate value of the envelope? Would it help if the "carrier" were >>triangular? >> > > Yes you have a point here! All I've proven so far is that when the input > signal contains only a carrier, full scale, then the output of the lowpass > filter is pretty much exactly 0.63 (2/pi), which is the average value of a > full scale sine wave. > > I was pretty happy to see this, but that's probably not AM demodulation > just yet! But isn't this what the Analog version does when using bandpass, > full wave rectifier and capacitor? The size of the capacitor (a.k.a. lowpass filter) matters. Put a 100pF capacitor across your signal and you filter out stuff you can't hear (and presumably, in this context, don't care about). It won't have a noticeable effect on audio frequencies. (But you should check to see what impedance 100pF represents at your carrier and modulating frequencies.) Put a 1000uF capacitor across your signal hand and you filter out everything down nearly to DC; in other words, you've reinvented the wall-wart (power supply, AC->DC converter, etc.). (Calculate the impedance of 1000uF at your carrier and modulating frequencies.) So... design your trailing LPF to eliminate signals above (say) 20kHz, feed it a carrier modulated by a 2000Hz signal, and see what you get out the far end. Hope this helps... Frank McKenney -- Liberty not only means that the individual has both the opportunity and the burden of choice; it also means that he must bear the consequences of his actions... Liberty and responsibility are inseparable. -- Friedrich von Hayek, The Constitution of Liberty 1960 -- Frank McKenney, McKenney Associates Richmond, Virginia / (804) 320-4887 Munged E-mail: frank uscore mckenney ayut mined spring dawt cahm (y'all)
From: glen herrmannsfeldt on 24 Apr 2010 13:25 Jerry Avins <jya(a)ieee.org> wrote: (snip, I wrote) >> OK, but say one wants to minimize the analog circuitry, and fast >> digital circuitry is available, including a fast ADC. That would >> seem to go against the analog bandpass filter, but a lot of digital >> filtering after the ADC could be provided. (snip) > With baseband sampling, we need an anti-alias lowpass filter. With > bandpass sampling, we need an anti-alias bandpass filter. >> But 1MHz is pretty slow for an ADC by now, isn't it? > Sure, but needing all those samples means that you need the MIPS > (and the watts) to process them. Why do that? Microprocessors are an inefficient way to do digital logic operations, but they are convenient to program. If you do it in an FPGA, as a systolic array, it should take a fairly small amount of logic and, hopefully, not so much power. >>> Incidentally, sampling at 1 MHz provides a little over 2 samples per >>> carrier cycle, with little chance that either of them will be near a >>> carrier peak and hence representative of the envelope. With bandpass >>> sampling at 50 KHz, there will be only one sample for every 9 or so >>> carrier cycles. There is then no hope of peak detection. >> Even a small FPGA should allow for a lot of digital filtering >> that can run at 100MHz or so. > I think the trade-offs between analog and digital selectivity keep > changing as technology advances. What sample rate would be needed to > digitize the whole AM band? Should we build receivers that way? I haven't followed it so closely, but I think that they now have most of an analog AM radio on a single chip. It would seem, though, that pretty soon AM radios could easily be built mostly digital, and maybe not so much longer for FM. Well, I had the idea not so long ago in an FPGA newsgroup about an FPGA based development board for college level digital logic classes. It would have the parts for a digital clock that could be used for a freshman level class, and then in later years one could convert to a clock radio. As above, the amount of analog circuitry would be minimized, such that much of the work goes into the digital part in the FPGA. As I understand it, many college level digital design classes are taught entirely with simulations. Students never see any actual hardware! -- glen
From: gretzteam on 24 Apr 2010 15:30
>The size of the capacitor (a.k.a. lowpass filter) matters. > >Put a 100pF capacitor across your signal and you filter out stuff you >can't hear (and presumably, in this context, don't care about). It >won't have a noticeable effect on audio frequencies. (But you should >check to see what impedance 100pF represents at your carrier and >modulating frequencies.) > >Put a 1000uF capacitor across your signal hand and you filter out >everything down nearly to DC; in other words, you've reinvented the >wall-wart (power supply, AC->DC converter, etc.). (Calculate the >impedance of 1000uF at your carrier and modulating frequencies.) > >So... design your trailing LPF to eliminate signals above (say) >20kHz, feed it a carrier modulated by a 2000Hz signal, and see what >you get out the far end. > >Hope this helps... Hi, Thanks, this helps! Now, I'm not building an AM radio, and I'm mostly interested in very low frequency (up to 20Hz), but I need quite good performance. My sampling rate and carrier are fixed and won't change. This is not under my control and were decided because of other stuff that this system is doing. So another way to ask the original question: When taking the absolute value of a digital signal, what really happens? I'm trying to see this from a frequency domain perspective. My original experiment - reinventing the wall-wart I guess - showed that the carrier is shifted to DC pretty well. I'm trying to get a feel for what happens to the sidebands, how much distortion is introduced when I move out of DC? I understand abs() is nonlinear, but there might be some analysis possible? Now, since multiplying by sin/cos is a perfect shift, I know the sidebands won't get affected, and my problem becomes designing a good lowpass filter. Thanks! |