From: life imitates life on
On Sun, 21 Feb 2010 11:41:49 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> wrote:

>On Sun, 21 Feb 2010 10:15:31 -0800, mike <spamme0(a)go.com> wrote:
>
>>Jim Thompson wrote:
>>> This rainy afternoon (East-coasters beware, that usually spells more
>>> snow for you), I was amusing myself trying to behavioral model a
>>> voltage regulator when you hit drop-out.
>>>
>>> Then I realized, I've never designed an integrated voltage regulator
>>> for general use, only those inside ASIC's where I can control all the
>>> conditions.
>>>
>>> Thus I'm clueless of behavior of commercial offerings at or below VDO.
>>>
>>> I'm guessing that output voltage drops linearly with VIN once the
>>> drop-out point is hit??
>>>
>>> But what about current capability? Does it drop sharply, linearly, or
>>> linearly to some critical point then drop like a rock.
>>>
>>> Pointers/data appreciated!
>>>
>>> Thanks!
>>>
>>> ...Jim Thompson
>>
>>What are your assumptions about the source?
>>A battery going flat might induce limit-cycle oscillations
>>that wouldn't show up with a stiff source?? or not...
>
>From my modeling point of view, the "source" is just "something"
>connected to the "IN" terminal.
>
>BUT, The way I am envisioning the model, a flaky source, if you have a
>model for it, would induce the very behavior you want to see.
>
>Maybe model "source" as a voltage source with a parameterized
>impedance rise?
>
>Or get out a battery manual and model "Charge", a parameter that
>reflects both voltage and impedance effects?
>
> ...Jim Thompson


Overlay multiple un-synched signals to create a psuedo-random average
modulation 'noise' in the drive signal that can be amplitude modulated to
mimic anomalous source events.
From: John Larkin on
On Sat, 20 Feb 2010 18:20:47 -0600, John Fields
<jfields(a)austininstruments.com> wrote:

>On Sat, 20 Feb 2010 16:13:14 -0700, Jim Thompson
><To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> wrote:
>
>>On Sat, 20 Feb 2010 16:57:41 -0600, John Fields
>><jfields(a)austininstruments.com> wrote:
>>
>>>On Sat, 20 Feb 2010 15:36:23 -0700, Jim Thompson
>>><To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> wrote:
>>>
>>>>On Sat, 20 Feb 2010 13:56:56 -0800, John Larkin
>>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote:
>>>>
>>>>>On Sun, 21 Feb 2010 03:13:45 +0530, "pimpom" <pimpom(a)invalid.invalid>
>>>>>wrote:
>>>>>
>>>>>>Jim Thompson wrote:
>>>>>>> This rainy afternoon (East-coasters beware, that usually spells
>>>>>>> more
>>>>>>> snow for you), I was amusing myself trying to behavioral model
>>>>>>> a
>>>>>>> voltage regulator when you hit drop-out.
>>>>>>>
>>>>>>> Then I realized, I've never designed an integrated voltage
>>>>>>> regulator
>>>>>>> for general use, only those inside ASIC's where I can control
>>>>>>> all the
>>>>>>> conditions.
>>>>>>>
>>>>>>> Thus I'm clueless of behavior of commercial offerings at or
>>>>>>> below VDO.
>>>>>>>
>>>>>>> I'm guessing that output voltage drops linearly with VIN once
>>>>>>> the
>>>>>>> drop-out point is hit??
>>>>>>>
>>>>>>> But what about current capability? Does it drop sharply,
>>>>>>> linearly, or
>>>>>>> linearly to some critical point then drop like a rock.
>>>>>>>
>>>>>>> Pointers/data appreciated!
>>>>>>
>>>>>>
>>>>>>I haven't done an in-depth study either, but I know that the
>>>>>>output voltage drops in an approximately linear manner down to a
>>>>>>certain level of Vin. I've observed input ripple reproduced
>>>>>>linearly at the output. I expect that behaviour below a critical
>>>>>>Vin level will be design-specific and will be hard to predict
>>>>>>without careful analysis. The critical level would be reached
>>>>>>when active devices can no longer be biased in the active region.
>>>>>>
>>>>>>I know even less about their actual behaviour regarding current
>>>>>>capability, but I do know that they do not drop sharply right
>>>>>>after dipping below Vdo. All this is assuming that we're talking
>>>>>>about common linear regulators like the 78xx series.
>>>>>>
>>>>>
>>>>>The internal schematics of classics like LM317 and LM1117 and such are
>>>>>on the data sheets. Some people (?) could deduce their behavior from
>>>>>that.
>>>>>
>>>>>John
>>>>
>>>>Those aren't LDO's, they're NPN "followers"; not PNP or PMOS, whose
>>>>behavior would be radically different, and quite process dependent.
>>>
>>>---
>>>In all fairness, you didn't indicate you were talking about LDO's and
>>>since "dropout voltage" applies to both beasts, who knew?
>>>
>>>Glad it got clarified though since, on a rainy Saturday afternoon in
>>>Austin, with nothing better to do than appreciate the difference between
>>>the bottle in front of me and a frontal lobotomy, I was heading for the
>>>soldering iron and the scope... ;)
>>>
>>>JF
>>
>>I checked the Tequila availability... enchiladas tonight ;-)
>
>---
>Yum!
>
>We're having leftover "Chicken Tagine" over newly boiled Basmati rice
>tonight.
>
>The recipe called for dried apricots and Garam Masala, but since we
>didn't have any dried apricots we substituted Smucker's Apricot
>Preserves.
>
>Sweetart don't hurt chicken; what a nice surprise!
>
>I'll post the recipe if you like, since it seems recipes aren't
>off-topic here. ;)
>---
>
>>I know there are various drop-out behaviors. JL was just trying to be
>>rude and dismissive with his "Some people (?)".
>
>---
>I noticed that.

Some people could also try running the LT Spice models of their LDOs.

Or even fire up some chips and see how they actually work... if they
don't mind using a soldering iron.

John


From: Phil Hobbs on
On 2/21/2010 12:29 PM, Jim Thompson wrote:
> On Sun, 21 Feb 2010 19:11:51 +0200, "E"<invalid(a)invalid.invalid>
> wrote:
>
>>
>> "Jim Thompson"<To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> kirjoitti
>> viestiss�:iro0o5hmfbejuo9lt3udkodidv4nitjd1m(a)4ax.com...
>>>>>
>>>>
>>>> The internal schematics of classics like LM317 and LM1117 and such are
>>>> on the data sheets. Some people (?) could deduce their behavior from
>>>> that.
>>>>
>>>> John
>>>
>>> Those aren't LDO's, they're NPN "followers"; not PNP or PMOS, whose
>>> behavior would be radically different, and quite process dependent.
>>>
>>
>> LP2950 has schematics on datasheet (National version).
>>
>> -ek
>>
>
> Thanks! I'll check that out. Although my past experiences in the
> "jelly bean" business is those schematics are usually "simplified" to
> hide IP.
>
> This is getting to be a really amusing mental endeavor! For instance,
> how might an LM7805 behave with a zener inserted in its ground lead to
> boost the voltage ?:-)
>
> ...Jim Thompson

Works great as long as the zener isn' too big. 7800s push about 5 mA
through their ground pins at zero load, iirc. LM317s put most of the
quiescent current out their outputs, and only 50 uA or so out the adjust
pin.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058
hobbs at electrooptical dot net
http://electrooptical.net
From: John Larkin on
On Sun, 21 Feb 2010 13:59:58 -0500, Phil Hobbs
<pcdhSpamMeSenseless(a)electrooptical.net> wrote:

>On 2/21/2010 12:29 PM, Jim Thompson wrote:
>> On Sun, 21 Feb 2010 19:11:51 +0200, "E"<invalid(a)invalid.invalid>
>> wrote:
>>
>>>
>>> "Jim Thompson"<To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> kirjoitti
>>> viestiss�:iro0o5hmfbejuo9lt3udkodidv4nitjd1m(a)4ax.com...
>>>>>>
>>>>>
>>>>> The internal schematics of classics like LM317 and LM1117 and such are
>>>>> on the data sheets. Some people (?) could deduce their behavior from
>>>>> that.
>>>>>
>>>>> John
>>>>
>>>> Those aren't LDO's, they're NPN "followers"; not PNP or PMOS, whose
>>>> behavior would be radically different, and quite process dependent.
>>>>
>>>
>>> LP2950 has schematics on datasheet (National version).
>>>
>>> -ek
>>>
>>
>> Thanks! I'll check that out. Although my past experiences in the
>> "jelly bean" business is those schematics are usually "simplified" to
>> hide IP.
>>
>> This is getting to be a really amusing mental endeavor! For instance,
>> how might an LM7805 behave with a zener inserted in its ground lead to
>> boost the voltage ?:-)
>>
>> ...Jim Thompson
>
>Works great as long as the zener isn' too big. 7800s push about 5 mA
>through their ground pins at zero load, iirc. LM317s put most of the
>quiescent current out their outputs, and only 50 uA or so out the adjust
>pin.
>
>Cheers
>
>Phil Hobbs

One can stack regulators too, putting the adj pin of one reg on the
output of another. I've done that three deep on occasion. Works great
with LM1117s for 1.25 and 2.5 for FPGA core and Vaux voltages... no
resistors!

You can also drive the adj pin from an opamp.

John

From: Jim Thompson on
On Sun, 21 Feb 2010 11:06:45 -0800, John Larkin
<jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote:

>On Sun, 21 Feb 2010 13:59:58 -0500, Phil Hobbs
><pcdhSpamMeSenseless(a)electrooptical.net> wrote:
>
>>On 2/21/2010 12:29 PM, Jim Thompson wrote:
>>> On Sun, 21 Feb 2010 19:11:51 +0200, "E"<invalid(a)invalid.invalid>
>>> wrote:
>>>
>>>>
>>>> "Jim Thompson"<To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> kirjoitti
>>>> viestiss�:iro0o5hmfbejuo9lt3udkodidv4nitjd1m(a)4ax.com...
>>>>>>>
>>>>>>
>>>>>> The internal schematics of classics like LM317 and LM1117 and such are
>>>>>> on the data sheets. Some people (?) could deduce their behavior from
>>>>>> that.
>>>>>>
>>>>>> John
>>>>>
>>>>> Those aren't LDO's, they're NPN "followers"; not PNP or PMOS, whose
>>>>> behavior would be radically different, and quite process dependent.
>>>>>
>>>>
>>>> LP2950 has schematics on datasheet (National version).
>>>>
>>>> -ek
>>>>
>>>
>>> Thanks! I'll check that out. Although my past experiences in the
>>> "jelly bean" business is those schematics are usually "simplified" to
>>> hide IP.
>>>
>>> This is getting to be a really amusing mental endeavor! For instance,
>>> how might an LM7805 behave with a zener inserted in its ground lead to
>>> boost the voltage ?:-)
>>>
>>> ...Jim Thompson
>>
>>Works great as long as the zener isn' too big. 7800s push about 5 mA
>>through their ground pins at zero load, iirc. LM317s put most of the
>>quiescent current out their outputs, and only 50 uA or so out the adjust
>>pin.
>>
>>Cheers
>>
>>Phil Hobbs
>
>One can stack regulators too, putting the adj pin of one reg on the
>output of another. I've done that three deep on occasion. Works great
>with LM1117s for 1.25 and 2.5 for FPGA core and Vaux voltages... no
>resistors!
>
>You can also drive the adj pin from an opamp.
>
>John

Yep. But what do they do when pulled into current limit when stacked,
say the simple zener case?

I know that bipolar types will forward bias the substrate, at least
momentarily.

LTspice models are already behavioral, not device level, so they model
behavior under "normal" circumstances.

Analog Devices' models are like that, as many have discovered ;-)

I guess that the lab is the only way to get data for a reasonable
model.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
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I love to cook with wine. Sometimes I even put it in the food.