CD4060 Xtl Osc. Circuit
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From: John Larkin on 15 Mar 2010 20:42 On Mon, 15 Mar 2010 19:20:07 -0500, "krw(a)att.bizzzzzzzzzzzz" <krw(a)att.bizzzzzzzzzzzz> wrote: >On Mon, 15 Mar 2010 12:20:11 -0700, John Larkin ><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: > >>On Sat, 13 Mar 2010 12:37:57 -0600, "krw(a)att.bizzzzzzzzzzzz" >><krw(a)att.bizzzzzzzzzzzz> wrote: >> >>>On Sat, 13 Mar 2010 09:05:24 -0800, John Larkin >>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On Sat, 13 Mar 2010 08:42:27 -0800, Fred Abse >>>><excretatauris(a)invalid.invalid> wrote: >>>> >>>>>On Fri, 12 Mar 2010 16:28:07 -0800, John Larkin wrote: >>>>> >>>>>> I never buy crystals for things like this. They have a high probability of >>>>>> not working, and you wind up fiddling with capacitors and such. It's >>>>>> easier to but a packaged, working crystal oscillator, already tuned to a >>>>>> couple PPM, guaranteed to oscillate, for $1.50 or thereabouts. >>>>> >>>>>Me, too. Amplifiers oscillate, oscillators don't ;-) >>>> >>>>We've just started using silicon oscillators, in SOT-23 sized >>>>packages, for things where 1% is good enough. We're using one part >>>>that's pin strappable for 8-4-2-1 MHz. >>> >>>A seven pin SOT-23? >> >>It's an LTC6930CMS8-8.00, in the MSOP8 package. It's basically an 8 >>MHz oscillator with three pins that can be strapped to divide by 1 >>through 128. > >That's a DFN, not SOT-23. We're buying the MSOP-8, as noted, which isn't a DFN. I did say "SOT-23 sized", which an MSOP8 pretty much is. I was at home when I first mentioned the part and didn't have the exact LTC part number handy. D/QFNs suck, though sadly there isn't often much >choice. Since it's only a binary selection it's not all that much use, >either. > >>Frequency is +-0.09% at room temp, plenty good for UARTS >>and most timing apps. > >Wrong frequency for a baud-rate-generator. If you have to add logic for the >baud-rate-generator, the binary divider chain doesn't help much. We use it to clock uPs and FPGAs. They most always have an internal, programmable PLL to bump the clock up to 20 or 100 or 240 MHz, whatever works. We're currently doing a VME module that has 64 (sixty-four!) latching relays on board, with an FPGA doing all the logic. An 8 MHz silicon clock is fine for that. We rarely use standalone chips like uarts. Most uPs have several these days, and we can always plop more into an FPGA. John
From: krw on 15 Mar 2010 20:56 On Mon, 15 Mar 2010 17:42:57 -0700, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Mon, 15 Mar 2010 19:20:07 -0500, "krw(a)att.bizzzzzzzzzzzz" ><krw(a)att.bizzzzzzzzzzzz> wrote: > >>On Mon, 15 Mar 2010 12:20:11 -0700, John Larkin >><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >> >>>On Sat, 13 Mar 2010 12:37:57 -0600, "krw(a)att.bizzzzzzzzzzzz" >>><krw(a)att.bizzzzzzzzzzzz> wrote: >>> >>>>On Sat, 13 Mar 2010 09:05:24 -0800, John Larkin >>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>> >>>>>On Sat, 13 Mar 2010 08:42:27 -0800, Fred Abse >>>>><excretatauris(a)invalid.invalid> wrote: >>>>> >>>>>>On Fri, 12 Mar 2010 16:28:07 -0800, John Larkin wrote: >>>>>> >>>>>>> I never buy crystals for things like this. They have a high probability of >>>>>>> not working, and you wind up fiddling with capacitors and such. It's >>>>>>> easier to but a packaged, working crystal oscillator, already tuned to a >>>>>>> couple PPM, guaranteed to oscillate, for $1.50 or thereabouts. >>>>>> >>>>>>Me, too. Amplifiers oscillate, oscillators don't ;-) >>>>> >>>>>We've just started using silicon oscillators, in SOT-23 sized >>>>>packages, for things where 1% is good enough. We're using one part >>>>>that's pin strappable for 8-4-2-1 MHz. >>>> >>>>A seven pin SOT-23? >>> >>>It's an LTC6930CMS8-8.00, in the MSOP8 package. It's basically an 8 >>>MHz oscillator with three pins that can be strapped to divide by 1 >>>through 128. >> >>That's a DFN, not SOT-23. > >We're buying the MSOP-8, as noted, which isn't a DFN. > >I did say "SOT-23 sized", which an MSOP8 pretty much is. I was at home >when I first mentioned the part and didn't have the exact LTC part >number handy. > > > D/QFNs suck, though sadly there isn't often much >>choice. Since it's only a binary selection it's not all that much use, >>either. >> >>>Frequency is +-0.09% at room temp, plenty good for UARTS >>>and most timing apps. >> >>Wrong frequency for a baud-rate-generator. If you have to add logic for the >>baud-rate-generator, the binary divider chain doesn't help much. > >We use it to clock uPs and FPGAs. They most always have an internal, >programmable PLL to bump the clock up to 20 or 100 or 240 MHz, >whatever works. We're currently doing a VME module that has 64 >(sixty-four!) latching relays on board, with an FPGA doing all the >logic. An 8 MHz silicon clock is fine for that. Which makes the divider redundant. My point. >We rarely use standalone chips like uarts. Most uPs have several these >days, and we can always plop more into an FPGA. Right, which is why I questioned your statement above. .1% isn't all that great. I can't remember when I didn't already have something in the system better than that. The fewer oscillators the better.
From: John Larkin on 15 Mar 2010 21:01 On Mon, 15 Mar 2010 19:56:28 -0500, "krw(a)att.bizzzzzzzzzzzz" <krw(a)att.bizzzzzzzzzzzz> wrote: >On Mon, 15 Mar 2010 17:42:57 -0700, John Larkin ><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: > >>On Mon, 15 Mar 2010 19:20:07 -0500, "krw(a)att.bizzzzzzzzzzzz" >><krw(a)att.bizzzzzzzzzzzz> wrote: >> >>>On Mon, 15 Mar 2010 12:20:11 -0700, John Larkin >>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On Sat, 13 Mar 2010 12:37:57 -0600, "krw(a)att.bizzzzzzzzzzzz" >>>><krw(a)att.bizzzzzzzzzzzz> wrote: >>>> >>>>>On Sat, 13 Mar 2010 09:05:24 -0800, John Larkin >>>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>>> >>>>>>On Sat, 13 Mar 2010 08:42:27 -0800, Fred Abse >>>>>><excretatauris(a)invalid.invalid> wrote: >>>>>> >>>>>>>On Fri, 12 Mar 2010 16:28:07 -0800, John Larkin wrote: >>>>>>> >>>>>>>> I never buy crystals for things like this. They have a high probability of >>>>>>>> not working, and you wind up fiddling with capacitors and such. It's >>>>>>>> easier to but a packaged, working crystal oscillator, already tuned to a >>>>>>>> couple PPM, guaranteed to oscillate, for $1.50 or thereabouts. >>>>>>> >>>>>>>Me, too. Amplifiers oscillate, oscillators don't ;-) >>>>>> >>>>>>We've just started using silicon oscillators, in SOT-23 sized >>>>>>packages, for things where 1% is good enough. We're using one part >>>>>>that's pin strappable for 8-4-2-1 MHz. >>>>> >>>>>A seven pin SOT-23? >>>> >>>>It's an LTC6930CMS8-8.00, in the MSOP8 package. It's basically an 8 >>>>MHz oscillator with three pins that can be strapped to divide by 1 >>>>through 128. >>> >>>That's a DFN, not SOT-23. >> >>We're buying the MSOP-8, as noted, which isn't a DFN. >> >>I did say "SOT-23 sized", which an MSOP8 pretty much is. I was at home >>when I first mentioned the part and didn't have the exact LTC part >>number handy. >> >> >> D/QFNs suck, though sadly there isn't often much >>>choice. Since it's only a binary selection it's not all that much use, >>>either. >>> >>>>Frequency is +-0.09% at room temp, plenty good for UARTS >>>>and most timing apps. >>> >>>Wrong frequency for a baud-rate-generator. If you have to add logic for the >>>baud-rate-generator, the binary divider chain doesn't help much. >> >>We use it to clock uPs and FPGAs. They most always have an internal, >>programmable PLL to bump the clock up to 20 or 100 or 240 MHz, >>whatever works. We're currently doing a VME module that has 64 >>(sixty-four!) latching relays on board, with an FPGA doing all the >>logic. An 8 MHz silicon clock is fine for that. > >Which makes the divider redundant. My point. > >>We rarely use standalone chips like uarts. Most uPs have several these >>days, and we can always plop more into an FPGA. > >Right, which is why I questioned your statement above. .1% isn't all that >great. I can't remember when I didn't already have something in the system >better than that. The fewer oscillators the better. I guess daylight savings time has made a lot of people bitchy today. John
From: krw on 15 Mar 2010 23:28 On Mon, 15 Mar 2010 18:01:19 -0700, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Mon, 15 Mar 2010 19:56:28 -0500, "krw(a)att.bizzzzzzzzzzzz" ><krw(a)att.bizzzzzzzzzzzz> wrote: > >>On Mon, 15 Mar 2010 17:42:57 -0700, John Larkin >><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >> >>>On Mon, 15 Mar 2010 19:20:07 -0500, "krw(a)att.bizzzzzzzzzzzz" >>><krw(a)att.bizzzzzzzzzzzz> wrote: >>> >>>>On Mon, 15 Mar 2010 12:20:11 -0700, John Larkin >>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>> >>>>>On Sat, 13 Mar 2010 12:37:57 -0600, "krw(a)att.bizzzzzzzzzzzz" >>>>><krw(a)att.bizzzzzzzzzzzz> wrote: >>>>> >>>>>>On Sat, 13 Mar 2010 09:05:24 -0800, John Larkin >>>>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>>>> >>>>>>>On Sat, 13 Mar 2010 08:42:27 -0800, Fred Abse >>>>>>><excretatauris(a)invalid.invalid> wrote: >>>>>>> >>>>>>>>On Fri, 12 Mar 2010 16:28:07 -0800, John Larkin wrote: >>>>>>>> >>>>>>>>> I never buy crystals for things like this. They have a high probability of >>>>>>>>> not working, and you wind up fiddling with capacitors and such. It's >>>>>>>>> easier to but a packaged, working crystal oscillator, already tuned to a >>>>>>>>> couple PPM, guaranteed to oscillate, for $1.50 or thereabouts. >>>>>>>> >>>>>>>>Me, too. Amplifiers oscillate, oscillators don't ;-) >>>>>>> >>>>>>>We've just started using silicon oscillators, in SOT-23 sized >>>>>>>packages, for things where 1% is good enough. We're using one part >>>>>>>that's pin strappable for 8-4-2-1 MHz. >>>>>> >>>>>>A seven pin SOT-23? >>>>> >>>>>It's an LTC6930CMS8-8.00, in the MSOP8 package. It's basically an 8 >>>>>MHz oscillator with three pins that can be strapped to divide by 1 >>>>>through 128. >>>> >>>>That's a DFN, not SOT-23. >>> >>>We're buying the MSOP-8, as noted, which isn't a DFN. >>> >>>I did say "SOT-23 sized", which an MSOP8 pretty much is. I was at home >>>when I first mentioned the part and didn't have the exact LTC part >>>number handy. >>> >>> >>> D/QFNs suck, though sadly there isn't often much >>>>choice. Since it's only a binary selection it's not all that much use, >>>>either. >>>> >>>>>Frequency is +-0.09% at room temp, plenty good for UARTS >>>>>and most timing apps. >>>> >>>>Wrong frequency for a baud-rate-generator. If you have to add logic for the >>>>baud-rate-generator, the binary divider chain doesn't help much. >>> >>>We use it to clock uPs and FPGAs. They most always have an internal, >>>programmable PLL to bump the clock up to 20 or 100 or 240 MHz, >>>whatever works. We're currently doing a VME module that has 64 >>>(sixty-four!) latching relays on board, with an FPGA doing all the >>>logic. An 8 MHz silicon clock is fine for that. >> >>Which makes the divider redundant. My point. >> >>>We rarely use standalone chips like uarts. Most uPs have several these >>>days, and we can always plop more into an FPGA. >> >>Right, which is why I questioned your statement above. .1% isn't all that >>great. I can't remember when I didn't already have something in the system >>better than that. The fewer oscillators the better. > > >I guess daylight savings time has made a lot of people bitchy today. Bitchy? I just don't understand your reasoning. I usually do.
From: John Larkin on 16 Mar 2010 00:09
On Mon, 15 Mar 2010 22:28:02 -0500, "krw(a)att.bizzzzzzzzzzzz" <krw(a)att.bizzzzzzzzzzzz> wrote: >On Mon, 15 Mar 2010 18:01:19 -0700, John Larkin ><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: > >>On Mon, 15 Mar 2010 19:56:28 -0500, "krw(a)att.bizzzzzzzzzzzz" >><krw(a)att.bizzzzzzzzzzzz> wrote: >> >>>On Mon, 15 Mar 2010 17:42:57 -0700, John Larkin >>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On Mon, 15 Mar 2010 19:20:07 -0500, "krw(a)att.bizzzzzzzzzzzz" >>>><krw(a)att.bizzzzzzzzzzzz> wrote: >>>> >>>>>On Mon, 15 Mar 2010 12:20:11 -0700, John Larkin >>>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>>> >>>>>>On Sat, 13 Mar 2010 12:37:57 -0600, "krw(a)att.bizzzzzzzzzzzz" >>>>>><krw(a)att.bizzzzzzzzzzzz> wrote: >>>>>> >>>>>>>On Sat, 13 Mar 2010 09:05:24 -0800, John Larkin >>>>>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>>>>> >>>>>>>>On Sat, 13 Mar 2010 08:42:27 -0800, Fred Abse >>>>>>>><excretatauris(a)invalid.invalid> wrote: >>>>>>>> >>>>>>>>>On Fri, 12 Mar 2010 16:28:07 -0800, John Larkin wrote: >>>>>>>>> >>>>>>>>>> I never buy crystals for things like this. They have a high probability of >>>>>>>>>> not working, and you wind up fiddling with capacitors and such. It's >>>>>>>>>> easier to but a packaged, working crystal oscillator, already tuned to a >>>>>>>>>> couple PPM, guaranteed to oscillate, for $1.50 or thereabouts. >>>>>>>>> >>>>>>>>>Me, too. Amplifiers oscillate, oscillators don't ;-) >>>>>>>> >>>>>>>>We've just started using silicon oscillators, in SOT-23 sized >>>>>>>>packages, for things where 1% is good enough. We're using one part >>>>>>>>that's pin strappable for 8-4-2-1 MHz. >>>>>>> >>>>>>>A seven pin SOT-23? >>>>>> >>>>>>It's an LTC6930CMS8-8.00, in the MSOP8 package. It's basically an 8 >>>>>>MHz oscillator with three pins that can be strapped to divide by 1 >>>>>>through 128. >>>>> >>>>>That's a DFN, not SOT-23. >>>> >>>>We're buying the MSOP-8, as noted, which isn't a DFN. >>>> >>>>I did say "SOT-23 sized", which an MSOP8 pretty much is. I was at home >>>>when I first mentioned the part and didn't have the exact LTC part >>>>number handy. >>>> >>>> >>>> D/QFNs suck, though sadly there isn't often much >>>>>choice. Since it's only a binary selection it's not all that much use, >>>>>either. >>>>> >>>>>>Frequency is +-0.09% at room temp, plenty good for UARTS >>>>>>and most timing apps. >>>>> >>>>>Wrong frequency for a baud-rate-generator. If you have to add logic for the >>>>>baud-rate-generator, the binary divider chain doesn't help much. >>>> >>>>We use it to clock uPs and FPGAs. They most always have an internal, >>>>programmable PLL to bump the clock up to 20 or 100 or 240 MHz, >>>>whatever works. We're currently doing a VME module that has 64 >>>>(sixty-four!) latching relays on board, with an FPGA doing all the >>>>logic. An 8 MHz silicon clock is fine for that. >>> >>>Which makes the divider redundant. My point. >>> >>>>We rarely use standalone chips like uarts. Most uPs have several these >>>>days, and we can always plop more into an FPGA. >>> >>>Right, which is why I questioned your statement above. .1% isn't all that >>>great. I can't remember when I didn't already have something in the system >>>better than that. The fewer oscillators the better. >> >> >>I guess daylight savings time has made a lot of people bitchy today. > >Bitchy? I just don't understand your reasoning. I usually do. OK, the reasoning is: A silicon oscillator in an MSOP-8 has advantages over a crystal oscillator in lots of applications... cost, size, power consumption. We are now using an 8 MHz part because it works in a number of applications. We'll probably use others in the future, too. John |