DC offset removal through FPGA
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From: robert bristow-johnson on 26 Jun 2005 12:41 in article 17Gdne_0PokBKyPfRVn-uw(a)rcn.net, Jerry Avins at jya(a)ieee.org wrote on 06/26/2005 10:07: > Matt Timmermans wrote: >> "robert bristow-johnson" <rbj(a)audioimagination.com> wrote in message >> news:BEE0C183.8824%rbj(a)audioimagination.com... >> >>> so now i beg the question: so what? what's the difference? >> >> >> It's the difference between a stop-band and a notch. > > What _is_ the difference between a notch and a stop-band; width? > How do you measure percentage bandwidth at DC? i still don't see the difference at all. same H(z) in both cases. unless some non-linear process (perhaps median filtering?) is put to the DC output of the LPF, anything linear that can be done explicitly subtracting DC from the input can be done with an HPF of identical transfer function. H_hpf(z) = 1 - H_lpf(z) remember, i was really only responding to Steve's in article d9eedv$lt1$1(a)nnews.pacific.net.hk, Steve Underwood at steveu(a)dis.org wrote on 06/23/2005 09:39: > ytregubov(a)yahoo.com wrote: >> Use highpass filter. >> >> Regards, >> Yuri >> > That's a really bad idea. A filter cutting off very low in the band is > not nice. Estimating the DC and subtracting it is the right approach. i am still at a loss as to why Yuri's idea is a really bad idea and how it is functionally different from estimating the DC and subtracting it, unless we get into any nonlinear methods used to estimate the DC. -- r b-j rbj(a)audioimagination.com "Imagination is more important than knowledge."
From: Matt Timmermans on 26 Jun 2005 13:21 "Jerry Avins" <jya(a)ieee.org> wrote in message news:17Gdne_0PokBKyPfRVn-uw(a)rcn.net... > How do you measure percentage bandwidth at DC? You don't. Given any analog IIR high-pass, you can vary the parameters to the bilinear transform to make the digital version into a notch at DC that's as narrow as you like, but the practicality of a direct form implementation of this is limited by stability and quantization errors, because you end up with poles and zeros clustered closely together around z=1. > Philosophy aside, what difference does it make to an effective > implementation? Well, for digital DC removal, Steve's suggestion is the right one -- estimate DC and subtract. This makes a transfer function of the form 1-H(z), for some low-pass DC estimator H(z). As long as H(z) is some sort of narrow low-pass, the result is just what is wanted -- 0 phase in the passband with extremely low ripple, and complete DC rejection. > Recall that the OP thought about using an FPGA to measure the "DC", > generate an analog signal equal to it, and a summer to subtract that from > the input of the ADC. Yes, and due to the feedback, this is actually a very different question. Since I wouldn't want to count on the feedback loop matching my expectations precisely, I would treat this problem more like motion control. After perhaps-too-little thought, I would recommend: - Pick a rate at which the DC estimate should change -- probably less than 1 LSB per sample. - At every sample clock, move the estimate toward the input value at that rate. If the chosen rate is a power of 2, then in the FPGA, this is a simple comparison and increment or decrement of the estimate variable. Compared to a single-pole integrator, this rate-limited control loop will more quickly approach the desired value when close to it, and won't overreact as much to short periods of DC-offset signal. -- Matt
From: Steve Underwood on 26 Jun 2005 22:05 Jerry Avins wrote: > Steve Underwood wrote: > >> >> I don't follow you. Going around the other side of the barn is the >> better and simpler solution here. You estimate the DC with a cheapo >> single pole IIR, which can be easily shaped, implemented without a >> single multiply, and inserts no delay. A directly implemented high >> pass would be maybe a massive FIR, or a bunch of bi-quads with >> horrible things happening in the dynamics of the numbers. > > > We're making different assumptions and I used a loose description. > Subtracting a DC estimate _is_ a high-pass filter, and can be a very > good one, especially with what I call "remainder saving" that avoids > drift due to rounding. Computing DC offset with an FPGA, generating a > voltage from the result, and subtracting it from the ADC input is > "going around the barn". Even that mat be justified by large applied > offsets that could overload the ADC. Remainder saving is the usual shaping method used. It is the simplest and most effective method, in a processor or FPGA solution. In these mixed digital and analogue loop systems, the use of an LPF to make a subtraction signal often creates complexity. You might need dithering to overcome the granularity of the ADC, or your DAC might be much coarser than your ADC. The latter is highly likely, since the reason you need to bring the signal into range is probably because there is some substantial analogue gain between the raw analogue and DAC signals and the ADC input. Usually you just need to nudge the signal into the operating range of the ADC. A finer grained removal of DC can be done later in the purely digital world. Getting the signal into range by simply nudging the signal when it goes out of range can give much faster settling, and guaranteed dead steady results after settling, however coarse the DAC resolution might be. Regards, Steve
From: Dave Coffey on 26 Jun 2005 22:25 Jerry Avins wrote: > Ouch! You want to discard the lower bits of the sum, but not of the > addends. For some purposes, it's even a good idea to save the > "discarded" bits (including sign) and add them to the next computed > average before truncating. It depends on which errors you want to minimize. Hi Jerry, That wasn't entirely the case. I suggested that the latch feeding the DAC be aligned to discard bits, not the actual accumulator itself. Guess I should have been more explicit. Dave.
From: ytregubov on 27 Jun 2005 04:26
I've mentioned LPF mostly because such signal filtering is a GENERIC thing and many signal processing tricks are in fact DFs. Kind russian regards, Yuri |