Discussing audio amplifier design -- BJT, discrete
in [Basics]
|
Prev: Watch replacemnt (button) batteries?
Next: Low Power Satellite Based Laser / Imaging System Could Easily Track Activity Disturbing Cheap Reflecting Fibers
From: Jon Kirwan on 28 Jan 2010 21:42 On Fri, 29 Jan 2010 02:09:16 +0530, "pimpom" <pimpom(a)invalid.invalid> wrote: >Jon Kirwan wrote: >> >> D1 is, I guess, silicon and given that you said _germanium_, >> I'll take that to suggest that the Vbe on those are about >> half that of a silicon BJT. Which is why only one DR25 was >> needed there. >> >I think this is where I left off earlier. > >> DC bias point of Q1... hmm. Well, assuming no signal, SPK1 >> is roughly a dead short, so R5 is tied one side to a rail. >> The other side moves Q2's base and Q2's emitter follows. As >> Q2's emitter rises with it, R2 and R3 act to split that as >> 1/11th to the Q1 base. Q1's emitter follows up for a ways, >> allowing DC current via R4 which must go through R5, dropping >> Q2's base and thus Q2's emitter, lowering Q1's base voltage >> in opposition. So there will be a middle point found. >> >> Assuming Q1's Vbe should be something on the order of 300mV >> (random guess), and I(R4) roughly equals I(R5), let's >> establish where Q1's base will wind up. Call it Vb. The >> value at Q2's emitter (which is also the other side of R2 >> from the Q1 base) will be 11 times higher because R2 and R3 >> split things that way. And Q2's base will be 300mV (same >> random guess, again) higher than that. The difference >> between there and the 9V battery voltage sets the current in >> R5 and, by implication, in R4 as well. Of course, Q1's >> emitter is 300mV away from that Vb value we are fussing over. >> The equation looks like: >> >> I(R5) = (9V - Vb*11 - 300mV) / 560 >> I(R4) = (Vb - 300mV) / 33 >> I(R4) = I(R5) >> So, >> (9V - Vb*11 - 300mV) / 560 = (Vb - 300mV) / 33 >> 33/560 * (9V - Vb*11 - 300mV) = (Vb - 300mV) >> Vb = 33/560 * (9V - Vb*11 - 300mV) + 300mV >> Vb = 33/560*9V - 33/560*Vb*11 - 33/560*300mV + 300mV >> Vb + 33/560*Vb*11 = 33/560*9V - 33/560*300mV + 300mV >> Vb * (1 + 33/560*11) = (33/560*9V - 33/560*300mV + 300mV) >> Vb = (33/560*9V - 33/560*300mV + 300mV) / (1 + 33/560*11) >> or, >> Vb = 493mV >> and thus the current routing through R5, D1, Q1, and R4 is >> about 193mV/33 or 5.85mA. That's not the total quiescent >> current because D1 uses that 5.85mA to develop a voltage >> across it that is probably on the order of 700mV. With that >> between the Q2 and Q3 bases, both Q2 and Q3 are passing >> collector currents, rail to rail. Hard to know how much >> without data sheets, I suppose. But something. Their shared >> emitter node would be on the order of 11*490mV or about 5.4V. >> >> That neglected the base current for Q1 flowing via R2. As >> I'm now guessing almost 6mA as Ic, and since we are talking >> germanium here, I will pick a beta of about 60 and figure >> about 100uA base current, then. That's about another 1V >> across R2, less than that a little because that lowers Vb a >> bit which lowers the 5.85mA figure a bit, which probably then >> gets things very darned close to the midpoint of 4.5V one >> might wish there. >> >> Not too bad given I have no idea about the BJTs and am using >> a lot of random guesses as I go. > >Your reasoning is correct. However, the output transistors Q2 and >Q3 need only about 100mV each of Vbe for Class AB bias. IIRC, >beta of Q1 is about 150 and Vbe at that level of current is about >0.12V. Thanks for the adjustments. At least, I didn't wander too far afield, for once. It's nice to hear I'm not totally out of my depth. >I don't know about others, but with low voltage circuits, I >usually try to fix the quiescent voltage at the output mid-point >at slightly more than half of Vcc. This is because Q1's Ve plus >its Vcesat reduces the available downward swing of Q3's base. Okay, that I follow. >For this design, I tentatively chose a target of 4.6V at Q3's >emitter. Add Q2's Vbe and that leaves 4.3V for R5 plus the >speaker's dc resistance. The speaker's resistance has only a >minor effect but, just for the heck of it, let's take it as 6 >ohms. So Q1's Ic = 4.3/566 = 7.6mA. I follow. Ve(Q2)=4.6V, Vbe(Q2)=0.1V, so Vb(Q2)=4.7V. Assuming a solid 9V power source (not what a 9V battery is, if that were used, but...), that leaves 9V-4.7V = 4.3V across R5 and SPK1. Which sets a current to the Vb node of Q2 that needs to be disposed of via D1 and then Q1. 7.6mA it is. >Q1's dc beta = 150, That high? I had anticipated germaniums were lower. Okay. >so Ib is about 50uA, Followed. >and Ie = 7.65mA = I(R4). Yes. 7.6mA+0.05mA = 7.65mA that must be dumped into R4. There will be some Q1 base current (another 50uA?) added to Ie(Q1) that is ignored here. No problem. That would only mean 7.7mA instead of 7.65mA for your calcs below. >7.65*33 places Q1's emitter at 252.45mV above ground. or 7.7mA*33 = 254.1mV, if you add Q1's base drive? >That plus >Vbe of 0.12V gives Vb = 372.45mV. Okay. >I(R3) = 372.45uA >I(R2) = I(R3) + Ib = 422.45uA >I(R2)*R2 = 4.2245V >V(R2) + Vb = (4.2245 + 0.37245)V = 4.59695V. > >It just so happens that, in this case, common resistor values >produce almost exactly the desired quiescent bias level. If they >didn't, a slight departure from the target voltages would be >acceptable. In any case, tolerances on resistor values and >transistor characteristics could throw off actual values a bit. I'm with you. Thanks for the care, here. >> R2 is not only a DC divider but also NFB, I think. Can you >> talk a little about how you figure on calculating both the >> NFB you want _and_ the DC biasing of this thing, both of >> which affect R2's value, I think? > >For such a simple design without a high level of audio quality as >the target, I wasn't too particular about the amount of signal >feedback as long as it's a reasonable amount. I chose a >compromise value for R3 first - low enough for bias stability so >that the current through it would be several times Ib, but not >too low to avoid excessive shunting of the signal input current. >Then I let the value of R2 be what it needs to be for correct >bias. Okay. So I remember in an earlier post you talking about 400uA being a factor of 9 higher. Guessing that Q1's base current is around the same area of 50uA, this would be a factor of 8... not the 9 you mentioned before. But at least I'm starting to see where that number 9 came from? >Then I calculate the amount of NFB as outlined in one of my >earlier replies and accept it if it's within reason. If I really >wanted more NFB, I'd parallel R2 with another resistor, but with >a capacitor in series to avoid upsetting the dc levels. Got it. That would provide additional AC feedback but keep the DC biasing. So you don't have to screw around balancing R2 against two different considerations, you just "fix it" with a patch like that. Makes total sense. >BTW, that >can be used to provide some bass boost by choosing the proper >values of cap and resistor. Hmm... Lower frequencies would have less NFB, higher frequencies more. Okay. There is also other areas where higher frequencies are going to see less gain in this design... Now I'm starting to wonder about phase shift not exactly 180 degrees in the NFB over frequency. But I need to sit down and think more. >> And although I've _seen_ >> miller feedbacks in the small nF range, could you talk a >> little about how that was set at 2.2nF? > >That's a guesstimated value, partly empirical and partly based on >observation of other people's designs. No PCs and simulation >software 40 years ago. For such a simple circuit, I didn't bother >with complex calculations for loops and phase shifts that >wouldn't be precise anyway due to wide tolerances in component >characteristics. > >The reason for the relatively high capacitance is that this was a >low-Z low-gain circuit. But I might have made a mistake in >showing it now as 2.2nF. I might have used something like 1nF. Okay. Nuff said. I'll leave that for later thinking. >> Also, I think I >> _almost_ get the idea of hooking one side of R5 to SPK1 >> instead of to the (-) side of 9V... but not quite sure. Can >> you talk about that choice, as well? > >This is a variation of the bootstrap circuit I described in my >other post. R5 and the speaker serve the same functions as R6 and >R7 respectively in the other circuit. Hmm. I generally get the thrust. I need to think more closely about the value of it. But I'll take it as something to explore more. Jon
From: Paul E. Schoen on 28 Jan 2010 22:14 "Jon Kirwan" <jonk(a)infinitefactors.org> wrote in message news:vcm2m5lhelb2t4imsik31fjuchkf4d931m(a)4ax.com... > > Have at me. I probably got a lot wrong in the above, but > that's my thinking exposed like a soft worm to be crushed. If > I learn in the process, crush away! Have you used LTSpice (AKA SwitcherCAD)? Some time ago I tried some ideas for linear amplifiers, and I came up with a design that is DC coupled and uses just three MOSFETs. You can trim the quiescent current to trade efficiency for crossover distortion. I originally made it with capacitor coupling and a single supply, but I redid it with a dual supply and DC coupling. As a practical matter, the amplifier may be a bit unstable and prone to overheating and even self-destruction if the bias current is set high enough to eliminate crossover distortion. If you can tolerate a few percent (tens of thousands of PPM, if you must), then it should be fairly stable. This design is basically an output stage only, and has no voltage amplification. That can be easily achieved with a simple class A input stage. When the output is driven just about to the rails, it puts out 5.5 watts into 8 ohms, with input power of 8.9 watts, or 62% efficiency. I'm using +/- 12 VDC rails and 7.7 VRMS input. There are two IRL3915 NMOS output transistors (STD30NF06 also work), and one IRF7205 PMOS. I have not actually built this circuit, and there are probably a number of problems with making it work using actual components, but I think it's worth a try. Of course, this is a MOSFET design and not BJT, but a similar circuit could be built using BJTs if that is a requirement. The ASCII file follows. Paul --------------------------------------------------------------- Version 4 SHEET 1 1304 744 WIRE 736 -176 192 -176 WIRE 976 -176 736 -176 WIRE 736 -144 736 -176 WIRE 976 -96 976 -176 WIRE 736 -48 736 -64 WIRE 736 -48 592 -48 WIRE 736 -16 736 -48 WIRE 928 -16 736 -16 WIRE 192 16 192 -176 WIRE 736 80 736 64 WIRE 736 208 400 208 WIRE 976 224 976 0 WIRE 1216 224 976 224 WIRE 1248 224 1216 224 WIRE 192 256 192 96 WIRE 192 256 144 256 WIRE 592 256 592 -48 WIRE 400 288 400 208 WIRE 1248 288 1248 224 WIRE 976 304 976 224 WIRE 976 304 848 304 WIRE 736 352 736 336 WIRE 192 400 192 256 WIRE 400 432 400 368 WIRE 848 432 848 304 WIRE 736 448 736 432 WIRE 800 448 736 448 WIRE 976 448 976 304 WIRE 1248 448 1248 368 WIRE 592 512 592 336 WIRE 736 512 736 448 WIRE 736 512 592 512 WIRE 928 528 848 528 WIRE 736 544 736 512 WIRE 848 560 848 528 WIRE 192 672 192 480 WIRE 736 672 736 624 WIRE 736 672 192 672 WIRE 848 672 848 640 WIRE 848 672 736 672 WIRE 976 672 976 544 WIRE 976 672 848 672 FLAG 144 256 0 FLAG 400 208 Vin FLAG 1216 224 Vout FLAG 400 432 0 FLAG 1248 448 0 SYMBOL voltage 192 0 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 12 SYMBOL voltage 400 272 R0 WINDOW 3 -127 203 Left 0 WINDOW 123 24 44 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value SINE(0 10 200 1u 0 0 5000) SYMATTR Value2 AC 1 SYMATTR InstName V1 SYMBOL nmos 928 -96 R0 SYMATTR InstName M1 SYMATTR Value IRL3915 SYMBOL nmos 928 448 R0 SYMATTR InstName M2 SYMATTR Value STD30NF06L SYMBOL pmos 800 528 M180 SYMATTR InstName M3 SYMATTR Value IRF7205 SYMBOL res 832 544 R0 SYMATTR InstName R2 SYMATTR Value 1k SYMBOL res 1232 272 R0 SYMATTR InstName R8 SYMATTR Value 8 SYMBOL res 720 -160 R0 SYMATTR InstName R9 SYMATTR Value 10k SYMBOL res 720 528 R0 SYMATTR InstName R1 SYMATTR Value 10k SYMBOL diode 720 80 R0 SYMATTR InstName D1 SYMATTR Value 1N4148 SYMBOL diode 720 144 R0 SYMATTR InstName D2 SYMATTR Value 1N4148 SYMBOL diode 720 208 R0 SYMATTR InstName D3 SYMATTR Value 1N4148 SYMBOL diode 720 272 R0 SYMATTR InstName D4 SYMATTR Value 1N4148 SYMBOL voltage 192 384 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value 12 SYMBOL res 576 240 R0 SYMATTR InstName R3 SYMATTR Value 470k SYMBOL res 720 -32 R0 SYMATTR InstName R4 SYMATTR Value 220 SYMBOL res 720 336 R0 SYMATTR InstName R5 SYMATTR Value 220 TEXT 264 704 Left 0 !.tran .5 TEXT 416 704 Left 0 !;ac oct 5 20 20000
From: Jon Kirwan on 28 Jan 2010 22:34 On Thu, 28 Jan 2010 22:14:12 -0500, "Paul E. Schoen" <paul(a)peschoen.com> wrote: >"Jon Kirwan" <jonk(a)infinitefactors.org> wrote in message >news:vcm2m5lhelb2t4imsik31fjuchkf4d931m(a)4ax.com... >> >> Have at me. I probably got a lot wrong in the above, but >> that's my thinking exposed like a soft worm to be crushed. If >> I learn in the process, crush away! > >Have you used LTSpice (AKA SwitcherCAD)? Oh, yes. However, my interest is in _learning_. I use LTspice to explore my own ignorance, at times. And I use it to test what I think I've learned. But I don't "hack" with it. Much. ;) >Some time ago I tried some ideas >for linear amplifiers, and I came up with a design that is DC coupled and >uses just three MOSFETs. You can trim the quiescent current to trade >efficiency for crossover distortion. I originally made it with capacitor >coupling and a single supply, but I redid it with a dual supply and DC >coupling. No FETs. I think I stated that in the beginning. There are a variety of reasons why. But suffice it that I don't want to go there... for now. >As a practical matter, the amplifier may be a bit unstable and prone to >overheating and even self-destruction if the bias current is set high >enough to eliminate crossover distortion. If you can tolerate a few percent >(tens of thousands of PPM, if you must), then it should be fairly stable. > >This design is basically an output stage only, and has no voltage >amplification. That can be easily achieved with a simple class A input >stage. > >When the output is driven just about to the rails, it puts out 5.5 watts >into 8 ohms, with input power of 8.9 watts, or 62% efficiency. I'm using >+/- 12 VDC rails and 7.7 VRMS input. There are two IRL3915 NMOS output >transistors (STD30NF06 also work), and one IRF7205 PMOS. I have not >actually built this circuit, and there are probably a number of problems >with making it work using actual components, but I think it's worth a try. >Of course, this is a MOSFET design and not BJT, but a similar circuit could >be built using BJTs if that is a requirement. Yeah. That's a requirement. I've still some learning ahead of me. But I'll take a look at the schematic and tuck it away, at least. Thanks. Jon >The ASCII file follows. > >Paul ><snip of LTspice .ASC file>
From: Paul E. Schoen on 29 Jan 2010 01:35 "Jon Kirwan" <jonk(a)infinitefactors.org> wrote in message news:thl4m5l8u5vk38tnmu5imr4hqvd829n693(a)4ax.com... > On Thu, 28 Jan 2010 22:14:12 -0500, "Paul E. Schoen" > <paul(a)peschoen.com> wrote: > >>"Jon Kirwan" <jonk(a)infinitefactors.org> wrote in message >>news:vcm2m5lhelb2t4imsik31fjuchkf4d931m(a)4ax.com... >>> >>> Have at me. I probably got a lot wrong in the above, but >>> that's my thinking exposed like a soft worm to be crushed. If >>> I learn in the process, crush away! >> >>Have you used LTSpice (AKA SwitcherCAD)? > > Oh, yes. However, my interest is in _learning_. I use > LTspice to explore my own ignorance, at times. And I use it > to test what I think I've learned. But I don't "hack" with > it. Much. ;) > >>Some time ago I tried some ideas >>for linear amplifiers, and I came up with a design that is DC coupled and >>uses just three MOSFETs. You can trim the quiescent current to trade >>efficiency for crossover distortion. I originally made it with capacitor >>coupling and a single supply, but I redid it with a dual supply and DC >>coupling. > > No FETs. I think I stated that in the beginning. There are > a variety of reasons why. But suffice it that I don't want > to go there... for now. > >>As a practical matter, the amplifier may be a bit unstable and prone to >>overheating and even self-destruction if the bias current is set high >>enough to eliminate crossover distortion. If you can tolerate a few >>percent >>(tens of thousands of PPM, if you must), then it should be fairly stable. >> >>This design is basically an output stage only, and has no voltage >>amplification. That can be easily achieved with a simple class A input >>stage. >> >>When the output is driven just about to the rails, it puts out 5.5 watts >>into 8 ohms, with input power of 8.9 watts, or 62% efficiency. I'm using >>+/- 12 VDC rails and 7.7 VRMS input. There are two IRL3915 NMOS output >>transistors (STD30NF06 also work), and one IRF7205 PMOS. I have not >>actually built this circuit, and there are probably a number of problems >>with making it work using actual components, but I think it's worth a >>try. >>Of course, this is a MOSFET design and not BJT, but a similar circuit >>could >>be built using BJTs if that is a requirement. > > Yeah. That's a requirement. I've still some learning ahead > of me. But I'll take a look at the schematic and tuck it > away, at least. Thanks. OK. So I made a similar amplifier output stage using two 2N3055s, and a 2N3904 and a 2N3906. With 8.4 VRMS input the output is 7.3 VRMS into 8 ohms for 6.66 watts. Input power is 9.97 watts, efficiency is 67%. Some very slight crossover distortion. 6 mA drive current (about 1.2k input impedance). Looks good 20 Hz to 20 kHz. I added an output inductor which affects output at higher frequencies. LTSpice ASCII follows. Paul ----------------------------------------------------------- Version 4 SHEET 1 1304 744 WIRE 736 -176 192 -176 WIRE 864 -176 736 -176 WIRE 976 -176 864 -176 WIRE 736 -144 736 -176 WIRE 864 -96 864 -176 WIRE 976 -96 976 -176 WIRE 736 -48 736 -64 WIRE 800 -48 736 -48 WIRE 912 -48 896 -48 WIRE 736 0 736 -48 WIRE 736 0 592 0 WIRE 896 0 896 -48 WIRE 896 0 864 0 WIRE 192 16 192 -176 WIRE 736 32 736 0 WIRE 736 128 736 96 WIRE 736 208 736 192 WIRE 736 208 400 208 WIRE 976 224 976 0 WIRE 1056 224 976 224 WIRE 1216 224 1136 224 WIRE 1248 224 1216 224 WIRE 592 240 592 0 WIRE 192 256 192 96 WIRE 192 256 144 256 WIRE 736 272 736 208 WIRE 400 288 400 208 WIRE 1248 288 1248 224 WIRE 976 304 976 224 WIRE 976 304 848 304 WIRE 592 352 592 320 WIRE 736 352 736 336 WIRE 736 352 592 352 WIRE 192 400 192 256 WIRE 848 400 848 304 WIRE 400 432 400 368 WIRE 736 448 736 352 WIRE 784 448 736 448 WIRE 976 448 976 304 WIRE 1248 448 1248 368 WIRE 912 496 848 496 WIRE 736 544 736 448 WIRE 848 560 848 496 WIRE 192 672 192 480 WIRE 736 672 736 624 WIRE 736 672 192 672 WIRE 848 672 848 640 WIRE 848 672 736 672 WIRE 976 672 976 544 WIRE 976 672 848 672 FLAG 144 256 0 FLAG 400 208 Vin FLAG 1216 224 Vout FLAG 400 432 0 FLAG 1248 448 0 SYMBOL voltage 192 0 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 12 SYMBOL voltage 400 272 R0 WINDOW 3 -127 203 Left 0 WINDOW 123 24 44 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value SINE(0 12 200 1u 0 0 5000) SYMATTR Value2 AC 1 SYMATTR InstName V1 SYMBOL res 832 544 R0 SYMATTR InstName R4 SYMATTR Value 470 SYMBOL res 1232 272 R0 SYMATTR InstName R1 SYMATTR Value 8 SYMBOL res 720 -160 R0 SYMATTR InstName R2 SYMATTR Value 2.7k SYMBOL res 720 528 R0 SYMATTR InstName R3 SYMATTR Value 2.7k SYMBOL diode 720 128 R0 SYMATTR InstName D1 SYMATTR Value 1N4148 SYMBOL diode 720 272 R0 SYMATTR InstName D4 SYMATTR Value 1N4148 SYMBOL voltage 192 384 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value 12 SYMBOL res 576 224 R0 SYMATTR InstName R5 SYMATTR Value 470 SYMBOL npn 912 -96 R0 SYMATTR InstName Q1 SYMATTR Value 2N3055 SYMBOL npn 912 448 R0 SYMATTR InstName Q2 SYMATTR Value 2N3055 SYMBOL pnp 784 496 M180 SYMATTR InstName Q3 SYMATTR Value 2N3906 SYMBOL npn 800 -96 R0 SYMATTR InstName Q4 SYMATTR Value 2N3904 SYMBOL ind 1040 240 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L1 SYMATTR Value 100� SYMBOL diode 720 32 R0 SYMATTR InstName D2 SYMATTR Value 1N4148 TEXT 264 704 Left 0 !.tran .5 TEXT 416 704 Left 0 !;ac oct 5 20 20000
From: Jon Kirwan on 29 Jan 2010 04:36
On Fri, 29 Jan 2010 01:35:05 -0500, "Paul E. Schoen" <paul(a)peschoen.com> wrote: ><snip> >OK. So I made a similar amplifier output stage using two 2N3055s, and a >2N3904 and a 2N3906. With 8.4 VRMS input the output is 7.3 VRMS into 8 ohms >for 6.66 watts. Input power is 9.97 watts, efficiency is 67%. Some very >slight crossover distortion. 6 mA drive current (about 1.2k input >impedance). Looks good 20 Hz to 20 kHz. I added an output inductor which >affects output at higher frequencies. LTSpice ASCII follows. ><snip> Got it and saved it. Sziklai pair on one side, Darlington on the other. 3 NPN, 1 PNP. Now I'm thinking about tubes (they don't come in complementary form) and using a signal splitter and NPNs "all the way down!" ;) Jon |