From: Aragorn on 28 Jan 2010 07:34 On Thursday 28 January 2010 09:16 in comp.os.linux.hardware, somebody identifying as Clemens Ladisch wrote... > Aragorn wrote: > >> Clemens Ladisch wrote... >> >>> ...] correctable errors should be corrected. The latter can either >>> be done in hardware by the memory controller, or by some SMM code, >>> or by the operating system. >> >> Well, I wasn't aware that the memory controller itself could do this >> (until the other replying poster pointed that out), and I was also >> not aware that the operating system could do it, since the operating >> system would by definition be subjected to those errors (since they >> are hardware errors). > > Well, there are two definitions of "corrected" that could apply here. > > When the CPU wants to read some memory location, and if the ECC > algorithm detects an error and can detect which of the bits has a > wrong value, the value that is sent to the CPU is the correct one. (1) > That value can also be written back into the RAM so that the error > won't occur again the next time that location is read. (2) > > (1) _must_ be done by the memory controller; (2) can be done either by > the memory controller or by the CPU. And what about the scrubbing of the CPU cache? The cache sits in between the CPU and the memory controller, so this cannot be "cleaned" by the memory controller, can it? Would this then be "cleaned" by the CPU, and if so, by the operating system or by SMM code? -- *Aragorn* (registered GNU/Linux user #223157)
From: Pascal Hambourg on 28 Jan 2010 09:14 Aragorn a �crit : > On Thursday 28 January 2010 09:16 in comp.os.linux.hardware, somebody > identifying as Clemens Ladisch wrote... >> >> When the CPU wants to read some memory location, The CPU or any other bus master, such as any DMA-capable adapter : graphics, mass storage, network... >> and if the ECC >> algorithm detects an error and can detect which of the bits has a >> wrong value, the value that is sent to the CPU is the correct one. (1) >> That value can also be written back into the RAM so that the error >> won't occur again the next time that location is read. (2) >> >> (1) _must_ be done by the memory controller; (2) can be done either by >> the memory controller or by the CPU. > > And what about the scrubbing of the CPU cache? The cache sits in > between the CPU and the memory controller, so this cannot be "cleaned" > by the memory controller, can it? Correct. > Would this then be "cleaned" by the > CPU, and if so, by the operating system or by SMM code? By the CPU's integrated cache controller, at least for (1).
From: Aragorn on 28 Jan 2010 10:25 On Thursday 28 January 2010 15:14 in comp.os.linux.hardware, somebody identifying as Pascal Hambourg wrote... > Aragorn a écrit : > >> On Thursday 28 January 2010 09:16 in comp.os.linux.hardware, somebody >> identifying as Clemens Ladisch wrote... >>> >>> When the CPU wants to read some memory location, > > The CPU or any other bus master, such as any DMA-capable adapter : > graphics, mass storage, network... > >>> and if the ECC algorithm detects an error and can detect which of >>> the bits has a wrong value, the value that is sent to the CPU is the >>> correct one. (1) That value can also be written back into the RAM so >>> that the error won't occur again the next time that location is >>> read. (2) >>> >>> (1) _must_ be done by the memory controller; (2) can be done either >>> by the memory controller or by the CPU. >> >> And what about the scrubbing of the CPU cache? The cache sits in >> between the CPU and the memory controller, so this cannot be >> "cleaned" by the memory controller, can it? > > Correct. > >> Would this then be "cleaned" by the >> CPU, and if so, by the operating system or by SMM code? > > By the CPU's integrated cache controller, at least for (1). Okay, thanks for clearing that up. ;-) -- *Aragorn* (registered GNU/Linux user #223157)
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