From: Petter Gustad on
glen herrmannsfeldt <gah(a)ugcs.caltech.edu> writes:

> Some time ago, I was wondering about using Verilog for PC board design.

I'm pretty bad when it comes to drawing schematics for PCB's as that
was never my primary job. I have also played with the idea of using an
HDL or even EDIF as I can write some neat Common Lisp software to
throw s-expressions around.

The big problem is not to create the netlist, but to interface it to
the parts database and the back-end tools which is usually
proprietary. One possibility would be to use gEDA or similar open
source PCB tools for the back-end work.

Petter

--
..sig removed by request.
From: Jonathan Bromley on
On Mon, 22 Mar 2010 20:38:42 +0000, Peter wrote:

>Towards the end of my era of doing complicated logic designs, a very
>nice product was from somebody like Altera. It was a FREE VHDL
>compiler, crippled to work with just a few low end devices e.g. a
>22V10.

Cypress WARP, maybe? I designed a good few PAL/GAL
devices with it. There was a cut-off-at-the-knees
version of the Veribest VHDL simulator, too -
can't remember who shipped that. I still have a
copy on my machine, but I can't get it to run under XP.
--
Jonathan Bromley
From: D Yuniskis on
Hi Peter,

Peter wrote:
>> Why? Won't you need to deal with supporting older products?
>
> I thought about this very hard.
>
> Of the FPGA designs I did, for those which might come back, I would
> never have time to set up all the software (on a PC with a DOS
> partition, which I don't have anymore), go up the not insignificant
> learning curve on the software, and then be able to make a commercial
> project out of it.

Understood. I try to keep "live" copies of all my tools
so the first issue isn't a problem. But, I will concede
that the second issue can be daunting -- especially if
it has been any serious amount of time since last used
(I find moving between different OS's to be a chore even
after just a few days! :< Different applications are
much worse!)

> Two of the designs were perhaps more significant.
>
> One was a 32-channel sound generator (basically 32 programmable pulse
> generators feeding a 32-input OR gate) which was originally done in
> 1992, on a full size ISA card, no kidding. About 8 years ago the
> customer wanted a PCI version of this card. I said to them I will give
> them the whole design free of charge but they will need to find
> somebody else to do it. I posted around Usenet looking for an FPGA
> programmer in SE UK and one or two turned up and I passed them on but
> never heard anything else. The *huge* issue is the commercial risk:
> one has to quote a fixed price, which would make it very profitable if
> the old tools worked fine, nothing went wrong, and I could still get
> the XC3030/3090 TQFP chips (which I probably could). But if something
> goes wrong, and e.g. I have to buy new tools, I would lose some high
> 4- or low 5-digit sum on it.

Yup. I won't even quote upgrades that look like they will
venture into The Great Unknown. Experience says that even T&M
can be a losing prospect :<

> The other was basically a complicated custom UART supporting some
> weird characters (122 bits long) with CRCs and all kinds of stuff.
> This project was done in 1993 and was hugely profitable, helping me to
> establish my manufacturing business (the kind of thing every
> consultant should be doing before his hair goes grey and his sandals

I don;t recall yours as showing much age! :> Though it *has* been
a few years (and I am always amazed at just how *quick* things like
this can change ;-)

> fall apart :)). To my astonishment the project came up 12 years later,
> via a completely different customer (but the same end user) and I
> simply bought more of the XC3090 devices (PLCC, seemed to be available

Wow! I wouldn't have thought them to still be available! I've
an XC4xxx in a design that I had abandoned figuring it would be
impossible to get...

> OK) and to my amazement it worked. I first sent a few devices to the
> customer (who was pretty smart) and he put them into his old boards,
> and it all worked, so evidently Xilinx did not change the silicon to
> make it much faster (and break my timing, which was done according to
> the *then* Xilinx guidelines which said it was OK to use local
> interconnect (with some 'max skew = 2ns or whatever' parameter on the
> wire) for clocks because the interconnects were much faster than the D

Ah!

> to Q propagation delays). The customer may buy again but I just need
> to source some more of the old devices. He won't need a logic
> redesign.
>
> The main project I did with the tools was maybe 1 man year spent on
> prototyping various evolutions of a very low power ASIC, with about
> 5000 gate equivalent of logic, a real time clock, etc. This one is not
> coming back.

So, your attitude is "move on to new tools *if* the need arises"?

> These tools will be very valuable to somebody who did designs in those
> days, which might come back for modifications. The devices are for the
> most part available; I checked the XC3090 etc about 2 years ago and
> Xiling were still selling them, and there are bound to be plenty on
> the surplus market which these days is huge.
From: Gerhard Hoffmann on
rickman wrote:
> On Mar 22, 1:46 pm, Jim Stewart <jstew...(a)jkmicro.com> wrote:
>> rickman wrote:
>>
>> snip..
>>
>>> I wonder how long it will be before we give up on schematics
>>> altogether and just write pin lists or net lists?
>> After I'm retired I hope. A well drawn schematic is a
>> thing of beauty, helping techs to troubleshoot and
>> customers to understand a product.
>>
>> You could also ask when mechanical engineers will stop
>> using fab drawings and just send the data as G codes.
>
> I guess if you have an analog design with a lot of small components a
> schematic is good, but for many digital designs there is almost no
> point. Look inside any number of modern products and you see one, two
> or three large IC packages with lots of traces between them and few
> smaller components. The schematics for these products are horrendous,
> often much less clear than a simple pin list. Its not that they were
> drawn badly, but that it is impossible to draw a 300+ pin part with
> much utility. Even by breaking the part into sections it still ends
> up being a pin list with a box around it.
>
> I'll grant that analog designs can gain from schematic, but many of
> the digital ones are pointless when drawn.

I recently played with the Altium Designer, seems to be quite OK, and I
exported a low noise amplifier in VHDL for the fun of it:

entity MAT02 is port (
base: inout something;
emitter: inout something;
collector: inout something
);
end entity MAT02;
............

q1: mat02 port map (
base => input,
emitter => tail_current_source,
collector => left_c
)

was quite pointless for an analog design. But then you can spice that amplifier,
at least from the original circuit.

(cited from memory under influence of some nice Rioja :-) )


OTOH you can easily bridge the gap between a Xilinx user constraint file and
the things on the board that are connected to the FPGA. I like it. Maybe I'll buy it.


Gerhard



From: Gerhard Hoffmann on
Peter wrote:

> That was another unfortunate product - their windoze version could not
> properly import DOS Orcad schematics (really clever).

DOS Orcad was a great improvement on its successors.
(with kind regards to Tony Hoare)


>> We ran 4 Compaq '286s overnight to possibly get a working 30[249]0 the next morning.
>
> What is that?

XC-3020, 3040, 3090. (regular expressions)

Ooops, wasn't that a 3042, really?

Gerhard