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From: GBaars on 17 Jun 2010 08:19
For narrow (fdev ~ 0.05 %) FM detection the phase noise of the CD74HCT4046
PLL's VCO
causes poor S+N/N ratio. Has a smaller / larger oscillator C any influence
and also the values of R1 and R2 of the VCO.
Do the 74HC(T)7046 or 74HC(T)9046 perform any better?


From: Bill Sloman on 17 Jun 2010 09:11
On Jun 17, 2:19 pm, "GBaars" <g.baar...(a)Chello.nl> wrote:
> For narrow (fdev ~ 0.05 %) FM detection the phase noise of the CD74HCT4046
> PLL's VCO
> causes poor S+N/N ratio. Has a smaller / larger oscillator C any influence
> and also the values of R1 and R2 of the VCO.
> Do the 74HC(T)7046 or 74HC(T)9046 perform any better?

Probably not. My - educated - guess is that the noise comes from the
MOS transistors in the oscillator, causing the random shifts in the
timing between successive transitions.

The only useful way of reducing this noise is to run the VCO faster
and use a counter to divide the output frequency down to actual
frequency that you need.

The phase noise is still there, but it is reduced in proportion to the
divide ratio, because the voltage noise in the transistors is
unchanged but the voltage ramp that is driving the switching is
steeper in proportion to the divide ratio.

--
Bill Sloman, Nijmegen
From: oo pere oo on 18 Jun 2010 04:16
GBaars wrote:
> For narrow (fdev ~ 0.05 %) FM detection the phase noise of the CD74HCT4046
> PLL's VCO
> causes poor S+N/N ratio. Has a smaller / larger oscillator C any influence
> and also the values of R1 and R2 of the VCO.
> Do the 74HC(T)7046 or 74HC(T)9046 perform any better?
>
>

What percentage of the fmax-fmin range is your FM signal covering? Or,
asking the same in a different way, what is your VCO control voltage swing?

Pere
From: Jean-Christophe on 18 Jun 2010 06:21
On Jun 17, 3:11 pm, Bill Sloman

> The only useful way of reducing this noise is to run the VCO faster
> and use a counter to divide the output frequency down to actual
> frequency that you need.
> The phase noise is still there, but it is reduced in proportion to the
> divide ratio, because the voltage noise in the transistors is
> unchanged but the voltage ramp that is driving the switching is
> steeper in proportion to the divide ratio.

I didn't expect that.
Nice one, thanks for this trick.
From: TheM on 18 Jun 2010 08:01
> On Jun 17, 3:11 pm, Bill Sloman
>
>> The only useful way of reducing this noise is to run the VCO faster
>> and use a counter to divide the output frequency down to actual
>> frequency that you need.
>> The phase noise is still there, but it is reduced in proportion to the
>> divide ratio, because the voltage noise in the transistors is
>> unchanged but the voltage ramp that is driving the switching is
>> steeper in proportion to the divide ratio.

3dB improvement in S/N per divide by 2?

M


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