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From: John on 31 Mar 2010 15:40
Hello,

I have a problem with HDL Coder when I try to translate to Verilog the module, that contains vectors (i try to use them as a memory). For example, if i try to use matrix in the module, then HDL Coder generates error messages, but if i try to use vectors, then there isn't any error messages from HDL Coder, but generated HDL files of such module are just a "dummies", that contains ports description and assigns them to zero in architecture part. Does HDL Coder support vectors ?
Thank you
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