From: larwe on
On May 15, 1:15 pm, Bhavik <bhavik.pa...(a)gmail.com> wrote:

> still work if I setup a bigger value of rows and columns, but It would
> create memory aliasing problem (or feature!), which I want to avoid.

SO CONFIGURE FOR THE WIDEST POSSIBILITY AND TEST FOR THE MEMORY
ALIASING. Sheesh, this is what I and others have been telling you.
From: Bhavik on
On May 15, 9:52 pm, larwe <zwsdot...(a)gmail.com> wrote:
> On May 15, 1:15 pm, Bhavik <bhavik.pa...(a)gmail.com> wrote:
>
> > still work if I setup a bigger value of rows and columns, but It would
> > create memory aliasing problem (or feature!), which I want to avoid.
>
> SO CONFIGURE FOR THE WIDEST POSSIBILITY AND TEST FOR THE MEMORY
> ALIASING. Sheesh, this is what I and others have been telling you.

Thanks all for the help. I am now able to correct memory width and
size configuration.
I still have one problem. The approach suggested here works only if
there is a memory connected on given chip select.

Is it possible to find if the memory is actually present on a given
chip select?
I have a device which has 256MB SDRAM on cs0, but there is no memory
on cs1. I tried reading some status registers for cs1, but they look
the same as cs0.
So I can't determine if the memory is actually present there.

From: RCIngham on
>On May 15, 9:52=A0pm, larwe <zwsdot...(a)gmail.com> wrote:
>> On May 15, 1:15=A0pm, Bhavik <bhavik.pa...(a)gmail.com> wrote:
>>
>> > still work if I setup a bigger value of rows and columns, but It
would
>> > create memory aliasing problem (or feature!), which I want to avoid.
>>
>> SO CONFIGURE FOR THE WIDEST POSSIBILITY AND TEST FOR THE MEMORY
>> ALIASING. Sheesh, this is what I and others have been telling you.
>
>Thanks all for the help. I am now able to correct memory width and
>size configuration.
>I still have one problem. The approach suggested here works only if
>there is a memory connected on given chip select.
>
>Is it possible to find if the memory is actually present on a given
>chip select?
>I have a device which has 256MB SDRAM on cs0, but there is no memory
>on cs1. I tried reading some status registers for cs1, but they look
>the same as cs0.
>So I can't determine if the memory is actually present there.
>

Walking 1 Data Test.

Ref: http://www.netrino.com/Embedded-Systems/How-To/Memory-Test-Suite-C


---------------------------------------
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From: Bhavik on
> Walking 1 Data Test.
>
> Ref:http://www.netrino.com/Embedded-Systems/How-To/Memory-Test-Suite-C

Thanks for this link. I have tried the test given there to check for
missing memory chip.
But in my case, the controller hangs if I try to access the memory
which is not connected. When I am using JTAG to debug this, it shows
"emulation running" message.

Any inputs on this?