How to fix LTspice schematic
in [Design]
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From: Johnny Boy on 29 Sep 2006 03:31 "Robert Baer" <robertbaer(a)earthlink.net> wrote in message news:1g3Tg.365$Lv3.12(a)newsread1.news.pas.earthlink.net... > Johnny Boy wrote: > > > "John - KD5YI" <groups5munge(a)verizon.net> wrote in message > > news:5xQSg.10632$KK.1918(a)trnddc08... > > > >>Johnny Boy wrote: > >> > >>>"Jenalee K." <jenaleek(a)yahoo.com> wrote in message > >>>news:1159430963.613705.232810(a)b28g2000cwb.googlegroups.com... > >>> > >>>Robert Baer a ?crit : > >>> > >>> > >>> > >>>>I do not understand the error message and have no clue to fix it. > >>>> The inverter may be the problem; would like it to "emulate" a TPS2818 > >>>>but do not know how. > >>> > >>> > >>>Actually playing with LTspice (V2.17i, May 2006) but not a specialist > >>>at all, I loaded your design and let it run. What error message? I > >>>don't get any. However, I don't think your circuit is doing what you > >>>want it to do... or maybe the simulation is too short. > >>> > >>>Thanks, > >>>Jenalee K. > >>> > >>>The first thing that I noticed is that the op-amps are being powered by > > > > a > > > >>>negative voltage, -12VDV > >>> > >>> > >> > >>No, they are powered correctly. He inverted the sources and then specified > >>them as negative outputs, so they come out right. > > > > > > Yeah, right. So the voltage source "+" terminal is really negative. Seems > > like an odd way to do it. > > ... Johnny > > > > > Yes, it does seem odd, except when one wishes to plot supply current > and want it to read positive.... Didn't mean to cast aspersions, Robert - I thought that there had to be a reason. .... Johnny
From: Robert Baer on 29 Sep 2006 04:13 Jenalee K. wrote: > Robert Baer a ?crit : > > >>I do not understand the error message and have no clue to fix it. >> The inverter may be the problem; would like it to "emulate" a TPS2818 >>but do not know how. > > > Actually playing with LTspice (V2.17i, May 2006) but not a specialist > at all, I loaded your design and let it run. What error message? I > don't get any. However, I don't think your circuit is doing what you > want it to do... or maybe the simulation is too short. > > Thanks, > Jenalee K. > I am running ver 2.18s, Sept 2006. Error message is: Singular matrix: check node m1#gate Iteration No.2 OK ...and it is *not* "OK"!
From: Robert Baer on 29 Sep 2006 04:15 Johnny Boy wrote: > "Robert Baer" <robertbaer(a)earthlink.net> wrote in message > news:1g3Tg.365$Lv3.12(a)newsread1.news.pas.earthlink.net... > >>Johnny Boy wrote: >> >> >>>"John - KD5YI" <groups5munge(a)verizon.net> wrote in message >>>news:5xQSg.10632$KK.1918(a)trnddc08... >>> >>> >>>>Johnny Boy wrote: >>>> >>>> >>>>>"Jenalee K." <jenaleek(a)yahoo.com> wrote in message >>>>>news:1159430963.613705.232810(a)b28g2000cwb.googlegroups.com... >>>>> >>>>>Robert Baer a ?crit : >>>>> >>>>> >>>>> >>>>> >>>>>>I do not understand the error message and have no clue to fix it. >>>>>> The inverter may be the problem; would like it to "emulate" a > > TPS2818 > >>>>>>but do not know how. >>>>> >>>>> >>>>>Actually playing with LTspice (V2.17i, May 2006) but not a specialist >>>>>at all, I loaded your design and let it run. What error message? I >>>>>don't get any. However, I don't think your circuit is doing what you >>>>>want it to do... or maybe the simulation is too short. >>>>> >>>>>Thanks, >>>>>Jenalee K. >>>>> >>>>>The first thing that I noticed is that the op-amps are being powered by >>> >>>a >>> >>> >>>>>negative voltage, -12VDV >>>>> >>>>> >>>> >>>>No, they are powered correctly. He inverted the sources and then > > specified > >>>>them as negative outputs, so they come out right. >>> >>> >>>Yeah, right. So the voltage source "+" terminal is really negative. > > Seems > >>>like an odd way to do it. >>>... Johnny >>> >>> >> >> Yes, it does seem odd, except when one wishes to plot supply current >>and want it to read positive.... > > > Didn't mean to cast aspersions, Robert - I thought that there had to be a > reason. > ... Johnny > > No offence taken; i am just a little wierd...
From: Johnny Boy on 29 Sep 2006 04:53 "Robert Baer" <robertbaer(a)earthlink.net> wrote in message news:nb3Tg.363$Lv3.147(a)newsread1.news.pas.earthlink.net... <snip> > That might help; how does one specify Vhigh and Trise for A1? > I was also wondering abuut a power supply for the inverter, but since > this is an emulator, maybe one does not need to be specified? <snip> Don't know about the inverter supply, but for Vhigh/low and Trise/fall, right-click the inverter, then copy the following into the "SpiceLine" attribute, (edit to suit).:- Vhigh=12 Vlow=0 Trise=100n Tfall=100n Td=100n (Thanks to DNA - I found this in his alternative to your circuit.) When I first ran this simulation, I got the same error as you, but after adding the above line to the inverter attributes, I get a different error:- Fatal Error: Singular matrix: check nodes n013 and u1:1:va+ Iteration No. 2 .... Johnny
From: John - KD5YI on 29 Sep 2006 09:03
Robert Baer wrote: > I am running ver 2.18s, Sept 2006. > Error message is: > Singular matrix: check node m1#gate > Iteration No.2 > OK > > ..and it is *not* "OK"! Add some resistance between A1 output and the gate and see if that helps. You might also need some resistance between L2 and C1. John |