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From: Mark Brehob on 5 May 2010 22:34
Hello,

Does anyone know the history of cache inclusion on Intel processors?
Last I'd paid attention, Intel had no plans for having strict
inclusion of the cache hierarchy. I know that in the late 90s Intel
used what they called “convenient inclusion,” that is the last level
of cache was neither fully exclusive nor inclusive other than by
random chance. Looking around, it appears as if the modern processors
from Intel have the L3 be inclusive of the lower-level caches though
I'm having a hard time proving that.

#1 Does anyone know of documentation that definitively states the
inclusion properties of (a) modern Intel processor(s)?
#2 Does anyone know when this change first came about?

I realized in a meeting today I said something based on old
information and I’m hoping to clear it up with some definitive
references so any pointers are greatly appreciated!

Thanks!
From: Quadibloc on 6 May 2010 03:29
On May 5, 8:34 pm, Mark Brehob <bre...(a)gmail.com> wrote:

> #1 Does anyone know of documentation that definitively states the
> inclusion properties of (a) modern Intel processor(s)?
> #2 Does anyone know when this change first came about?
>
> I realized in a meeting today I said something based on old
> information and I’m hoping to clear it up with some definitive
> references so any pointers are greatly appreciated!

Wikipedia, at

http://en.wikipedia.org/wiki/CPU_cache

claims that the Intel Core i7 has a fully inclusive L2 cache.

Since the L2 cache is much larger than the L1 cache, it is to be
expected that it would be inclusive. The other kinds of cache are more
complicated, and thus are usually only resorted to if there is a clear
benefit to avoiding wasting space in the L2 cache duplicating
everything in the L1 cache. This is true if the L2 cache is small, or
if it is direct-mapped (leading to things being needlessly kicked out
of the L1 cache).

John Savard
From: Quadibloc on 6 May 2010 03:32
On May 6, 1:29 am, Quadibloc <jsav...(a)ecn.ab.ca> wrote:

> Wikipedia, at
>
> http://en.wikipedia.org/wiki/CPU_cache
>
> claims that the Intel Core i7 has a fully inclusive L2 cache.

Sorry, that's the L3 cache which is fully inclusive.

John Savard
From: Mark Brehob on 6 May 2010 08:00
On May 6, 3:32 am, Quadibloc <jsav...(a)ecn.ab.ca> wrote:
> On May 6, 1:29 am, Quadibloc <jsav...(a)ecn.ab.ca> wrote:
>
> > Wikipedia, at
>
> >http://en.wikipedia.org/wiki/CPU_cache
>
> > claims that the Intel Core i7 has a fully inclusive L2 cache.
>
> Sorry, that's the L3 cache which is fully inclusive.
>
> John Savard

Thanks John,
I'm not seeing the claim that the Intel Core i7 is fully inclusive
there (I may be blind) but that did end up leading me to
http://software.intel.com/en-us/articles/who-moved-the-goal-posts-the-rapidly-changing-world-of-cpus/
where the claim is clearly made for the L3. By the tone of the
presentation I'm guessing that previous processors didn't have an
inclusive L3/L2, but I can't prove it...
From: MitchAlsup on 6 May 2010 12:32
On May 5, 9:34 pm, Mark Brehob <bre...(a)gmail.com> wrote:
> Hello,
>
> Does anyone know the history of cache inclusion on Intel processors?

I suspect that if the sets of associativity of the interrior caches
are larger than the sets of associativity of the outermost cache, then
it is unwise to try to guarentee inclusion.

This sets up the scenario where the cache hierarchy looks inclusive
when you are runninig on only one of several cores in the part, but
fails to look inclusive when the application is running on all the
cores of the part.

{We also know that the AMD parts are not strictly inclusive.}

Is there a particular reason that inclusion is useful or necessary for
your application?

Mitch

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