Intel details future Larrabee graphics chip
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From: Dirk Bruere at NeoPax on 5 Aug 2008 15:57 Chris M. Thomasson wrote: > "John Larkin" <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in > message news:rtrg9458spr43ss941mq9p040b2lp6hbgg(a)4ax.com... >> On Tue, 5 Aug 2008 13:30:52 +0200, "Skybuck Flying" >> <BloodyShame(a)hotmail.com> wrote: >> >>> As the number of cores goes up the watt requirements goes up too ? >> >> Not necessarily, if the technology progresses and the clock rates are >> kept reasonable. And one can always throttle down the CPUs that aren't >> busy. >> >>> >>> Will we need a zillion watts of power soon ? >>> >>> Bye, >>> Skybuck. >>> >> >> I saw suggestions of something like 60 cores, 240 threads in the >> reasonable future. > > I can see it now... A mega-core GPU chip that can dedicate 1 core > per-pixel. Why not? Probably configured as a systolic array http://en.wikipedia.org/wiki/Systolic_array -- Dirk http://www.transcendence.me.uk/ - Transcendence UK http://www.theconsensus.org/ - A UK political party http://www.onetribe.me.uk/wordpress/?cat=5 - Our podcasts on weird stuff
From: Rarius on 5 Aug 2008 19:13 "Dirk Bruere at NeoPax" <dirk.bruere(a)gmail.com> wrote in message news:6fqv72Fcv806U1(a)mid.individual.net... > Skybuck Flying wrote: >> As the number of cores goes up the watt requirements goes up too ? >> >> Will we need a zillion watts of power soon ? >> >> Bye, >> Skybuck. > > Since the ATI Radeon� HD 4800 series has 800 cores you work it out. Just note that the 4870 needs TWO of those 6 pin power leads... Rarius ---- Posted via Pronews.com - Premium Corporate Usenet News Provider ---- http://www.pronews.com offers corporate packages that have access to 100,000+ newsgroups
From: NV55 on 6 Aug 2008 22:28 On Aug 5, 5:26 am, Dirk Bruere at NeoPax <dirk.bru...(a)gmail.com> wrote: > Skybuck Flying wrote: > > As the number of cores goes up the watt requirements goes up too ? > > > Will we need a zillion watts of power soon ? > > > Bye, > > Skybuck. > > Since the ATI Radeon HD 4800 series has 800 cores you work it out. > > -- > Dirk Each of the 800 "cores", which are simple stream processors, in ATI RV770 (Radeon 4800 series) are not comparable to the 16, 24, 32 or 48 cores that will be in Larrabee. Just like they're not comparable to the 240 "cores" in Nvidia GeForce GTX 280. Though I'm not saying you didn't realize that, just for those that might not have.
From: John Larkin on 6 Aug 2008 22:57 On Tue, 5 Aug 2008 12:54:14 -0700, "Chris M. Thomasson" <no(a)spam.invalid> wrote: >"John Larkin" <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in message >news:rtrg9458spr43ss941mq9p040b2lp6hbgg(a)4ax.com... >> On Tue, 5 Aug 2008 13:30:52 +0200, "Skybuck Flying" >> <BloodyShame(a)hotmail.com> wrote: >> >>>As the number of cores goes up the watt requirements goes up too ? >> >> Not necessarily, if the technology progresses and the clock rates are >> kept reasonable. And one can always throttle down the CPUs that aren't >> busy. >> >>> >>>Will we need a zillion watts of power soon ? >>> >>>Bye, >>> Skybuck. >>> >> >> I saw suggestions of something like 60 cores, 240 threads in the >> reasonable future. > >I can see it now... A mega-core GPU chip that can dedicate 1 core per-pixel. > >lol. > > > > >> This has got to affect OS design. > >They need to completely rethink their multi-threaded synchronization >algorihtms. I have a feeling that efficient distributed non-blocking >algorihtms, which are comfortable running under a very weak cache coherency >model will be all the rage. Getting rid of atomic RMW or StoreLoad style >memory barriers is the first step. Run one process per CPU. Run the OS kernal, and nothing else, on one CPU. Never context switch. Never swap. Never crash. John
From: Nick Maclaren on 7 Aug 2008 03:47
In article <b0pk941drmfvmlr4osre4evus6dlpu2iq4(a)4ax.com>, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> writes: |> On Tue, 5 Aug 2008 12:54:14 -0700, "Chris M. Thomasson" |> <no(a)spam.invalid> wrote: |> >"John Larkin" <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in message |> >news:rtrg9458spr43ss941mq9p040b2lp6hbgg(a)4ax.com... |> > |> >> This has got to affect OS design. |> > |> >They need to completely rethink their multi-threaded synchronization |> >algorihtms. I have a feeling that efficient distributed non-blocking |> >algorihtms, which are comfortable running under a very weak cache coherency |> >model will be all the rage. Getting rid of atomic RMW or StoreLoad style |> >memory barriers is the first step. |> |> Run one process per CPU. Run the OS kernal, and nothing else, on one |> CPU. Never context switch. Never swap. Never crash. Been there - done that :-) That is precisely how the early SMP systems worked, and it works for dinky little SMP systems of 4-8 cores. But the kernel becomes the bottleneck for many workloads even on those, and it doesn't scale to large numbers of cores. So you HAVE to multi-thread the kernel. SGI were (are?) the leaders, but all of HP, IBM and Sun have been along the same path. Modern Linux is multi-threaded. Regards, Nick Maclaren. |