From: David Blubaugh on 12 Jul 2010 16:58 To All, I am right now in the process to determine if LISP can be utilized to develop an FPGA applications?? Can I use LISP as a hardware description language and then have LISP to be generated into a binary file to be downloaded to an FPGA?? Thanks, David
From: Peter Keller on 12 Jul 2010 17:33 David Blubaugh <davidblubaugh2000(a)gmail.com> wrote: > To All, > > > I am right now in the process to determine if LISP can be utilized to > develop an FPGA applications?? > > Can I use LISP as a hardware description language and then have LISP > to be generated into a binary file to be downloaded to an FPGA?? I haven't done any serious Verilog, or whatever, but do you mean something like this? Verilog: module toplevel(clock,reset); input clock; input reset; reg flop1; reg flop2; always @ (posedge reset or posedge clock) if (reset) begin flop1 <= 0; flop2 <= 1; end else begin flop1 <= flop2; flop2 <= flop1; end endmodule Made into (pulling out of my butt) Made up Language: (defmodule toplevel ((input clock) (input reset)) (with-reg (flop1 flop2) (while (or (posedge reset) (posedge clock)) (if reset (progn (setf-nb flop1 0) (setf-nb flop2 1)) (progn (setf-nb flop1 flop2) (setf-nb flop2 flop1)))))) Then, there would just be a compiler which iterates over the form in a meta-circular evaluator-like manner and compiles it to binary. LISP can read/write binary files just fine. I haven't seen too much Verilog, but Lisp macros might prove a nice thing in a syntac like the above. The best thing is, I'm sure there is a completely other valid interpretation of "Made Up Language" other people in this group could give--and probably be far better than mine. I've only tinkered with this stuff, but it seems very doable to me. However, the solution I picked basically means you're implementing a LISP syntax of Verilog. I don't know if that is worth it or what your motivations are. But hey, it could be done. -pete
From: Raffael Cavallaro on 12 Jul 2010 17:53 On 2010-07-12 16:58:04 -0400, David Blubaugh said: > I am right now in the process to determine if LISP can be utilized to > develop an FPGA applications?? > > Can I use LISP as a hardware description language and then have LISP > to be generated into a binary file to be downloaded to an FPGA?? Marc Battyani has been using Common Lisp with FPGAs for high performance computing applications in medecine and finance: <http://www.fractalconcept.com/> and: <http://www.linkedin.com/in/marcbattyani> warmest regards, Ralph -- Raffael Cavallaro
From: Rob Warnock on 12 Jul 2010 20:19 David Blubaugh <davidblubaugh2000(a)gmail.com> wrote: +--------------- | Can I use LISP as a hardware description language and then have LISP | to be generated into a binary file to be downloaded to an FPGA?? +--------------- Short answer: Yes, but you'll need to have *good* documentation on the binary file format. Longer answer: If you look at the EDIF or ".EDN" files produced by many common electronic design tools [schematic entry, etc.], you'll find that EDIF files *are* S-expressions [albeit case-sensitive, which can be handled in CL by using :INVERT readtable case], so if you already use FPGA design tools which output EDIF then you don't even have to output "binary" -- CL can easily output EDIF text files directly. In any case, the place to start is at the output: What is the desired end result of your efforts? A file to be input into an FPGA programmer? A file to be input into an EEROM programmer [for those FPGAs which are programmed at pwoer-up by reading an external EEROM]? Or what? You will need to know the format of *that* file, in all of its gory details. You will then need to write a CL program which generates that format. [Not a biggy -- see the chapters on binary I/O in Peter Seibel's "Practical Common Lisp".] If the final file format if proprietary and/or unavailable, then you will have to target the file format of the last upstream tool for which you *do* know the input format, e.g., an FPGA "place & route" tool, perhaps. [That's why I pointed you at EDIF...] -Rob ----- Rob Warnock <rpw3(a)rpw3.org> 627 26th Avenue <URL:http://rpw3.org/> San Mateo, CA 94403 (650)572-2607
From: D Herring on 12 Jul 2010 22:28 On 07/12/2010 05:53 PM, Raffael Cavallaro wrote: > Marc Battyani has been using Common Lisp with FPGAs for high > performance computing applications in medecine and finance: > > <http://www.fractalconcept.com/> > > and: > > <http://www.linkedin.com/in/marcbattyani> See also the main NovaSparks website. http://www.novasparks.com/ - Daniel P.S. They gave a presentation at the Boston Lisp meeting a month or two ago. The CL group is here in Boston; the hardware group is in Paris. Pretty cool stuff. Many of us were drooling for this technology to reach home computers. *Much* cooler than GPU programming.
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