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From: Del Cecchi on 8 Jan 2010 11:28 "Kai Harrekilde-Petersen" <khp(a)harrekilde.dk> wrote in message news:ufx6h6bho.fsf(a)harrekilde.dk... > Stephen Fuld <SFuld(a)alumni.cmu.edu.invalid> writes: > >> Del Cecchi` wrote: >>> Anne & Lynn Wheeler wrote: >>>> Stephen Fuld <SFuld(a)alumni.cmu.edu.invalid> writes: >>>> >>>>> Do you want to know the history of Infiniband or some details of >>>>> what >>>>> it was designed to do (and mostly does)? >>>> >>>> >>>> minor reference to SCI (being implementable subset of FutureBus) >>>> http://en.wikipedia.org/wiki/Scalable_Coherent_Interface >>>> >>>> eventually morphing into current InfiniBand >>>> http://en.wikipedia.org/wiki/InfiniBand >>>> >>> >>> I don't recall any morphing at all from SCI to IB. And I was >>> involved in both. For openers SCI was source synchronous parallel >>> and ib is byte serial. SCI is coherent, IB is not. >> >> I agree with Del here. I don't remember SCI as being a part of it, >> as >> SCI was clearly intended as a coherent bus among multiple >> processors, >> whereas IB was aimed at things like clusters, but as much as that, >> an >> I/O interface to disks, etc. SCI was never targeted at that >> market. > > SCI started out as the grand be-all-end-all cache-coherent > super-thing, but it could also do non-coherent transfers, and at > Dolphin ICS, we sure had more success in attracting customers to use > the noncoherent transfers for clustering (or as an IO extension bus) > than doing the cache coherence stuff. > > On the cc-SCI side, we only had DG as a customer, with their > Numaliine > series. > > > Kai > -- > Kai Harrekilde-Petersen <khp(at)harrekilde(dot)dk> We almost had a IBM proprietary version of SCI for AS400 but times got a little tough and POK claimed that it wouldn't work without massive rewrite of OS, even though AS400 OS guys thought different. Project got whacked. Did show up in the NUMA x-series models. Note the bi directional loops and source synchronous. The coherence was more DASH like however. Linked lists are great for huge systems but for limited numbers of nodes advantage goes away. del
From: Stephen Fuld on 8 Jan 2010 12:25 Del Cecchi wrote: snip > Interesting. One additional data item, as I understand it PCI-X was > an IBM/Compaq/whoever that got foisted on Intel. Correct. Intel didn't like it from the start, for all the reasons I mentioned and more. They wanted to replace PCI, not extend it. Had NGIO come out about on its original schedule, that would have been done. But part of the "deal" between the two groups was the support of PCI-X as an interim step to IB. > So perhaps there was > a little "in your face" thing there also. Could be. I won't comment on motivations. But clearly the time delay to a PCI replacement made PCI-X more desirable. -- - Stephen Fuld (e-mail address disguised to prevent spam)
From: Kai Harrekilde-Petersen on 8 Jan 2010 13:20 "Del Cecchi" <delcecchi(a)gmail.com> writes: > "Kai Harrekilde-Petersen" <khp(a)harrekilde.dk> wrote in message > news:ufx6h6bho.fsf(a)harrekilde.dk... >> Stephen Fuld <SFuld(a)alumni.cmu.edu.invalid> writes: >> >>> Del Cecchi` wrote: >>>> Anne & Lynn Wheeler wrote: >>>>> Stephen Fuld <SFuld(a)alumni.cmu.edu.invalid> writes: >>>>> >>>>>> Do you want to know the history of Infiniband or some details of >>>>>> what >>>>>> it was designed to do (and mostly does)? >>>>> >>>>> >>>>> minor reference to SCI (being implementable subset of FutureBus) >>>>> http://en.wikipedia.org/wiki/Scalable_Coherent_Interface >>>>> >>>>> eventually morphing into current InfiniBand >>>>> http://en.wikipedia.org/wiki/InfiniBand >>>>> >>>> >>>> I don't recall any morphing at all from SCI to IB. And I was >>>> involved in both. For openers SCI was source synchronous parallel >>>> and ib is byte serial. SCI is coherent, IB is not. >>> >>> I agree with Del here. I don't remember SCI as being a part of it, >>> as >>> SCI was clearly intended as a coherent bus among multiple >>> processors, >>> whereas IB was aimed at things like clusters, but as much as that, >>> an >>> I/O interface to disks, etc. SCI was never targeted at that >>> market. >> >> SCI started out as the grand be-all-end-all cache-coherent >> super-thing, but it could also do non-coherent transfers, and at >> Dolphin ICS, we sure had more success in attracting customers to use >> the noncoherent transfers for clustering (or as an IO extension bus) >> than doing the cache coherence stuff. >> >> On the cc-SCI side, we only had DG as a customer, with their >> Numaliine series. > > We almost had a IBM proprietary version of SCI for AS400 but times got > a little tough and POK claimed that it wouldn't work without massive > rewrite of OS, even though AS400 OS guys thought different. Project > got whacked. Did show up in the NUMA x-series models. Note the bi > directional loops and source synchronous. The coherence was more DASH > like however. Linked lists are great for huge systems but for limited > numbers of nodes advantage goes away. I think that SGI's cache-coherent links from that time was well inspired by SCI as well. It had certain proprietary extensions such as separate checksum for the header which made it simpler/quicker to react to packets than SCI, but the main parts described in papers at the time sure looked like SCI to me. SCI developed the LVDS IO signalling standard as part of the work, which is still used today (albeit at a much higher bitrate) quite outside the area it was intended for (DVI, HDMI, laptop-screens). Kai -- Kai Harrekilde-Petersen <khp(at)harrekilde(dot)dk>
From: Petter Gustad on 9 Jan 2010 04:41 Kai Harrekilde-Petersen <khp(a)harrekilde.dk> writes: > On the cc-SCI side, we only had DG as a customer, with their Numaliine > series. Not only. The Convex Exemplar was using Dolphin IP for cache coherency. The latest incarnation of the Dolphin SCI technology can now be found at http://www.numascale.com. Petter -- A: Because it messes up the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing on usenet and in e-mail?
From: Stephen Fuld on 9 Jan 2010 12:26
Del Cecchi wrote: snip > My perspective is that IB got caught in a war/battle between the > server guys at intel and the desktop guys. Yes, although it wasn't quite that simple. See my other post for the contributions of the competing consortium to delays, and "complexification". > Looks like desktop won > since pci-express is basically the same physical layer as IB without > all the good stuff that makes IB complicated. Yup. > PCI express was, to my > view, the desktop guys throwing the server guys under the bus, so to > speak. That was certainly the effect. > As for sayings, you might like one I used periodically "(I don't care > what the simulations say) You can't bullshit an electron. " I don't > recall if I made that up or stole it from someone. Probably the > latter. It was certainly in common use where I worked in the early 1990s. It could have been descended from Richard Feynman's famous statement in his appendix to the Challenger report. Approximately "Public relations must give way to reality for Mother Nature won't be fooled". I once worked with an IBM marketing guy who had some great "laws". Things like "There is always a worst bug". I once compiled a few and posted them on my office wall. -- - Stephen Fuld (e-mail address disguised to prevent spam) |