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From: John Larkin on 16 Jul 2010 13:10
On Thu, 15 Jul 2010 23:07:59 -0700, Kevin McMurtrie
<mcmurtrie(a)pixelmemory.us> wrote:

>In article <i1mggn$ktb$1(a)news.eternal-september.org>,
> "George Jefferson" <phreon111(a)gmail.com> wrote:
>
>> On page 239 of AOE there is a laboratory DC amp. The input uses a limiter.
>> It says that if Vin exceeds V- that the phase will change. I do not
>> understand what it means? The output of the op amp's phase will change sign?
>> Is this a normal property of op amps? e.g., if I put in a voltage that goes
>> below it's most negative rail it will invert the output?
>>
>> Also, what about using fets for limiters instead of diodes? Any worth in
>> doing it or just adding useless complexity?
>>
>
>http://en.wikipedia.org/wiki/Long-tailed_pair#Long-tailed_pair
>
>Consider the case of the 'inv input' being between -v and +v and higher
>than the 'non-inv input'. The output will go low as expected. Keep
>raising 'inv input' and it will eventually force the output to an
>incorrect high level. It gets worse if 'non-inv input' is driven too
>high - the output will be an open circuit that may receive current from
>outside the pair.

What's worse is that the pins and parts inside most linear ICs are
isolated from the substrate by back-biased diode junctions. Pull a pin
a little below V-, and you forward bias these diodes. In lots of
chips, that will spray charge all over the place and mess up all sorts
of stuff. Worse, some chips will find a sneak SCR somewhere in their
layers and latch up. LM34, for example, is a superbly sensitive
latching spike detector. The original 4000 series digital CMOS parts
ditto.

It's impressive how many IC designers ignore both of these effects, by
accident or on purpose.

John

From: miso on 16 Jul 2010 17:27
On Jul 16, 10:10 am, John Larkin
<jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote:
> On Thu, 15 Jul 2010 23:07:59 -0700, Kevin McMurtrie
>
>
>
> <mcmurt...(a)pixelmemory.us> wrote:
> >In article <i1mggn$kt...(a)news.eternal-september.org>,
> > "George Jefferson" <phreon...(a)gmail.com> wrote:
>
> >> On page 239 of AOE there is a laboratory DC amp. The input uses a limiter.
> >> It says that if Vin exceeds V- that the phase will change. I do not
> >> understand what it means? The output of the op amp's phase will change sign?
> >> Is this a normal property of op amps? e.g., if I put in a voltage that goes
> >> below it's most negative rail it will invert the output?
>
> >> Also, what about using fets for limiters instead of diodes? Any worth in
> >> doing it or just adding useless complexity?
>
> >http://en.wikipedia.org/wiki/Long-tailed_pair#Long-tailed_pair
>
> >Consider the case of the 'inv input' being between -v and +v and higher
> >than the 'non-inv input'.  The output will go low as expected.  Keep
> >raising 'inv input' and it will eventually force the output to an
> >incorrect high level.  It gets worse if 'non-inv input' is driven too
> >high - the output will be an open circuit that may receive current from
> >outside the pair.
>
> What's worse is that the pins and parts inside most linear ICs are
> isolated from the substrate by back-biased diode junctions. Pull a pin
> a little below V-, and you forward bias these diodes. In lots of
> chips, that will spray charge all over the place and mess up all sorts
> of stuff. Worse, some chips will find a sneak SCR somewhere in their
> layers and latch up. LM34, for example, is a superbly sensitive
> latching spike detector. The original 4000 series digital CMOS parts
> ditto.
>
> It's impressive how many IC designers ignore both of these effects, by
> accident or on purpose.
>
> John

I take great umbrage (er whatever that means ;-) ) that latchup is
ignored by designers. Parts need to pass some corporate latchup limit
else they are not allowed to be sold. The limits are not so great for
analog chips, but most companies insist on 40ma or so at room
temperature. Prior to tape out, the layout is studied for potential
latchup situations and false collectors are added to the design where
needed. Standard input protection should have the false collectors in
their layout.

"Doctor, it hurts when I pull pins beyond the power supply rails."
"Well, don't do that!"

From: Jim Thompson on 16 Jul 2010 21:53
On Fri, 16 Jul 2010 10:10:30 -0700, John Larkin
<jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote:

>On Thu, 15 Jul 2010 23:07:59 -0700, Kevin McMurtrie
><mcmurtrie(a)pixelmemory.us> wrote:
>
>>In article <i1mggn$ktb$1(a)news.eternal-september.org>,
>> "George Jefferson" <phreon111(a)gmail.com> wrote:
>>
>>> On page 239 of AOE there is a laboratory DC amp. The input uses a limiter.
>>> It says that if Vin exceeds V- that the phase will change. I do not
>>> understand what it means? The output of the op amp's phase will change sign?
>>> Is this a normal property of op amps? e.g., if I put in a voltage that goes
>>> below it's most negative rail it will invert the output?
>>>
>>> Also, what about using fets for limiters instead of diodes? Any worth in
>>> doing it or just adding useless complexity?
>>>
>>
>>http://en.wikipedia.org/wiki/Long-tailed_pair#Long-tailed_pair
>>
>>Consider the case of the 'inv input' being between -v and +v and higher
>>than the 'non-inv input'. The output will go low as expected. Keep
>>raising 'inv input' and it will eventually force the output to an
>>incorrect high level. It gets worse if 'non-inv input' is driven too
>>high - the output will be an open circuit that may receive current from
>>outside the pair.
>
>What's worse is that the pins and parts inside most linear ICs are
>isolated from the substrate by back-biased diode junctions. Pull a pin
>a little below V-, and you forward bias these diodes. In lots of
>chips, that will spray charge all over the place and mess up all sorts
>of stuff. Worse, some chips will find a sneak SCR somewhere in their
>layers and latch up. LM34, for example, is a superbly sensitive
>latching spike detector. The original 4000 series digital CMOS parts
>ditto.
>
>It's impressive how many IC designers ignore both of these effects, by
>accident or on purpose.
>
>John

On purpose? Come on John, get real.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Friday is Wine and Cheeseburger Day
From: John Larkin on 16 Jul 2010 22:41
On Fri, 16 Jul 2010 14:27:37 -0700 (PDT), "miso(a)sushi.com"
<miso(a)sushi.com> wrote:

>On Jul 16, 10:10�am, John Larkin
><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote:
>> On Thu, 15 Jul 2010 23:07:59 -0700, Kevin McMurtrie
>>
>>
>>
>> <mcmurt...(a)pixelmemory.us> wrote:
>> >In article <i1mggn$kt...(a)news.eternal-september.org>,
>> > "George Jefferson" <phreon...(a)gmail.com> wrote:
>>
>> >> On page 239 of AOE there is a laboratory DC amp. The input uses a limiter.
>> >> It says that if Vin exceeds V- that the phase will change. I do not
>> >> understand what it means? The output of the op amp's phase will change sign?
>> >> Is this a normal property of op amps? e.g., if I put in a voltage that goes
>> >> below it's most negative rail it will invert the output?
>>
>> >> Also, what about using fets for limiters instead of diodes? Any worth in
>> >> doing it or just adding useless complexity?
>>
>> >http://en.wikipedia.org/wiki/Long-tailed_pair#Long-tailed_pair
>>
>> >Consider the case of the 'inv input' being between -v and +v and higher
>> >than the 'non-inv input'. �The output will go low as expected. �Keep
>> >raising 'inv input' and it will eventually force the output to an
>> >incorrect high level. �It gets worse if 'non-inv input' is driven too
>> >high - the output will be an open circuit that may receive current from
>> >outside the pair.
>>
>> What's worse is that the pins and parts inside most linear ICs are
>> isolated from the substrate by back-biased diode junctions. Pull a pin
>> a little below V-, and you forward bias these diodes. In lots of
>> chips, that will spray charge all over the place and mess up all sorts
>> of stuff. Worse, some chips will find a sneak SCR somewhere in their
>> layers and latch up. LM34, for example, is a superbly sensitive
>> latching spike detector. The original 4000 series digital CMOS parts
>> ditto.
>>
>> It's impressive how many IC designers ignore both of these effects, by
>> accident or on purpose.
>>
>> John
>
>I take great umbrage (er whatever that means ;-)

Has to do with getting enough fiber in your diet

) that latchup is
>ignored by designers. Parts need to pass some corporate latchup limit
>else they are not allowed to be sold. The limits are not so great for
>analog chips, but most companies insist on 40ma or so at room
>temperature. Prior to tape out, the layout is studied for potential
>latchup situations and false collectors are added to the design where
>needed. Standard input protection should have the false collectors in
>their layout.

How I wish those rules had the force of law. Latch up a chip, go to
jail.

>
>"Doctor, it hurts when I pull pins beyond the power supply rails."
>"Well, don't do that!"

Tell that to Spike.

John


From: Michael A. Terrell on 18 Jul 2010 16:11

"miso(a)sushi.com" wrote:
>
> "Doctor, it hurts when I pull pins beyond the power supply rails."
> "Well, don't do that!"


Do you have a license for that rubber chicken?


--
Anyone wanting to run for any political office in the US should have to
have a DD214, and a honorable discharge.
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