MIPS TSC synchronization
in [Kernel]
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From: Mathieu Desnoyers on 21 Nov 2009 12:00 * Ashwin Tanugula (ashwin.tanugula(a)broadcom.com) wrote: > > > > > > However, I was only able to view two out of 10 traces generated. > > > > > > These errors seem to be caused by the fact that you run a SMP mips system with frequency scaling (either dynamic freq. scaling., or halting the clock in idle). > > > You might wait to try to disable the freq. scaling and see if it works better. > > > Hi Mathieu, > > 1) With the patch on thop of 177, HAVE_UNSYNCHRONIZED_TSC was disabled and test_tsc_synchronization (arch/mips/kerne > l/smp.c) was never called. So, we never knew if there was any TSC offset between the CPUs. (adding Ralf and LKML in CC) test_tsc_synchronization() is introduced by the LTTng tree. So in mainline you would have never known that there was such a TSC offset between your cores. > > > 2) With HAVE_UNSYNCHRONIZED_TSC enabled, TSC offset between the CPUs was huge. > > Boot messages: > > checking TSC synchronization across all online CPUs: > Measured 152179143 cycles TSC offset between CPUs, turning off TSC clock. > > I think this happened because of the stub function for synchronise_count_master in arch/mips/include/asm/r4k-timer.h > > > 3) With HAVE_UNSYNCHRONIZED_TSC and enabled SYNC_R4K, arch/mips/kernel/sync-r4k.c gets compiled and I don't see any offset. > > > Boot Messages: > > checking TSC synchronization across all online CPUs: passed. > > And I can view my traces on lttv without any problem. > Great ! > > > I guess arch/mips/kernel/sync-r4k.c is buggy on SMTC. I see that SYNC_R4K is only selected by MIPS_CMP usually. Maybe a select for it should be added to your kind of board ? > > > Can you please confirm if this is right or not? Given I am not a MIPS expert, I added some people in CC. They might help confirming this if you provide information about: - Number of CPUs - Threads per CPUs (seems to be one, given CONFIG_MIPS_MT_SMTC is not set in your configuration) - your .config Thanks, Mathieu > > Thanks, > Ashwin > > > -- Mathieu Desnoyers OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
From: Ashwin Tanugula on 25 Nov 2009 21:30
Hi, Here is the information you asked for. - Number of CPUs Two - Threads per CPUs (seems to be one, given CONFIG_MIPS_MT_SMTC is not set in your configuration) One - your .config Attached Sorry for the late reply. Thanks, Ashwin > > > > > > However, I was only able to view two out of 10 traces generated. > > > > > > These errors seem to be caused by the fact that you run a SMP mips system with frequency scaling (either dynamic freq. scaling., or halting the clock in idle). > > > You might wait to try to disable the freq. scaling and see if it works better. > > > Hi Mathieu, > > 1) With the patch on thop of 177, HAVE_UNSYNCHRONIZED_TSC was disabled and test_tsc_synchronization (arch/mips/kerne > l/smp.c) was never called. So, we never knew if there was any TSC offset between the CPUs. (adding Ralf and LKML in CC) test_tsc_synchronization() is introduced by the LTTng tree. So in mainline you would have never known that there was such a TSC offset between your cores. > > > 2) With HAVE_UNSYNCHRONIZED_TSC enabled, TSC offset between the CPUs was huge. > > Boot messages: > > checking TSC synchronization across all online CPUs: > Measured 152179143 cycles TSC offset between CPUs, turning off TSC clock. > > I think this happened because of the stub function for synchronise_count_master in arch/mips/include/asm/r4k-timer.h > > > 3) With HAVE_UNSYNCHRONIZED_TSC and enabled SYNC_R4K, arch/mips/kernel/sync-r4k.c gets compiled and I don't see any offset. > > > Boot Messages: > > checking TSC synchronization across all online CPUs: passed. > > And I can view my traces on lttv without any problem. > Great ! > > > I guess arch/mips/kernel/sync-r4k.c is buggy on SMTC. I see that SYNC_R4K is only selected by MIPS_CMP usually. Maybe a select for it should be added to your kind of board ? > > > Can you please confirm if this is right or not? Given I am not a MIPS expert, I added some people in CC. They might help confirming this if you provide information about: - Number of CPUs - Threads per CPUs (seems to be one, given CONFIG_MIPS_MT_SMTC is not set in your configuration) - your .config Thanks, Mathieu > > Thanks, > Ashwin > > > -- Mathieu Desnoyers OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68 |