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From: Skybuck Flying on 7 Jun 2010 17:11
Hello,

Suppose I want to design a new instruction for the x86 instruction set or
perhaps the newer version/extension the x64 instruction set... I have a
question about that...

The question is:

What's the maximum number of operands at my disposal for the design ?

For example SHLD has 3 operands:

Two flexible ones and one hard coded one: CL

So what is the maximum number of "flexible operands" ?

And what is the maximum number of "hardcoded operands" ?

For hardcoded operands I imagine that there might be no limit... for example
a "machine/state reset" instruction could simply reset the entire
machine/state.

But I could also imagine that there might be hardware limitations to do or
unwanted situations cost wise... but for now I am looking for true
architectural maximums.

For the "flexible operands" I am not sure what the answer is... ? also is it
a different answer for x86 vs x64 ?

Bye,
Skybuck.




From: Alexei A. Frounze on 7 Jun 2010 19:47
On Jun 7, 2:11 pm, "Skybuck Flying" <IntoTheFut...(a)hotmail.com> wrote:
> Hello,
>
> Suppose I want to design a new instruction for the x86 instruction set or
> perhaps the newer version/extension the x64 instruction set... I have a
> question about that...
>
> The question is:
>
> What's the maximum number of operands at my disposal for the design ?
>
> For example SHLD has 3 operands:
>
> Two flexible ones and one hard coded one: CL
>
> So what is the maximum number of "flexible operands" ?
>
> And what is the maximum number of "hardcoded operands" ?
>
> For hardcoded operands I imagine that there might be no limit... for example
> a "machine/state reset" instruction could simply reset the entire
> machine/state.
>
> But I could also imagine that there might be hardware limitations to do or
> unwanted situations cost wise... but for now I am looking for true
> architectural maximums.
>
> For the "flexible operands" I am not sure what the answer is... ? also is it
> a different answer for x86 vs x64 ?
>
> Bye,
>   Skybuck.

I think IRET would be your case for maximum (or near maximum) number
of implicit operands. Its description spans several pages and there
are many many things involved.
Among the general purpose instructions, think of CMPXCHG8/16B, CPUID,
PUSHA/POPA, REP SCAS*.

Alex
From: Skybuck Flying on 7 Jun 2010 21:44
Ok, so implicit operands which I would call the hardcoded operands can be
many...

This leaves the question how many explicit/flexible operands can
instructions have ?

For now my guess would be 2 for general x86 instructions... for sse I am not
so sure...

Bye,
Skybuck.


From: Torben �gidius Mogensen on 8 Jun 2010 03:52
"Skybuck Flying" <IntoTheFuture(a)hotmail.com> writes:

> Suppose I want to design a new instruction for the x86 instruction set or
> perhaps the newer version/extension the x64 instruction set... I have a
> question about that...
>
> The question is:
>
> What's the maximum number of operands at my disposal for the design ?

As many as you like. Since x86 uses variable-length instructions, there
is no fixed upper limit.

If you want to add your new instructions by a minimal modification to an
existing implementation of the ISA, the answer depends on which
implementation you choose to modify. If the implementation translates
an x86 instruction into micro instructions internally, the answer is
still that you can pretty much use as many operands as you like, as long
as your complex instruction can be expressed in terms of the existing
micro instructions. If not, it gets more complicated. If your
instruction actually requires a modification of the ALU, it gets even
more hairy. Adding an extra operand to the ALU is probably
prohibitively expensive, as it is likely to slow everything else down.

Torben
From: Alexei A. Frounze on 8 Jun 2010 05:01
On Jun 7, 6:44 pm, "Skybuck Flying" <IntoTheFut...(a)hotmail.com> wrote:
> Ok, so implicit operands which I would call the hardcoded operands can be
> many...
>
> This leaves the question how many explicit/flexible operands can
> instructions have ?

General-purpose ones have at most 2 because that's how many you can
specify in the ModR/M byte.

> For now my guess would be 2 for general x86 instructions... for sse I am not
> so sure...

If they use ModR/M and nothing else like it, 2 max.

Alex
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