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From: nedbrek on 20 Jun 2010 08:01
Hello all,

"Brett Davis" <ggtgp(a)yahoo.com> wrote in message
news:ggtgp-233521.16161319062010(a)news.isp.giganews.com...
>
> And an interesting if off topic Itanic paper.
>
> http://sysdoc.doors.ch/HP/jssc_fetzer.pdf
>

If I have -MAX_INT scorn for Itanium architects and planners, then I have
~that respect for the McKinley implementation guys.

I've said it before, and I'll say it again. The McKinley implementation is
a very nearly ideal in-order implementation of the Itanium architecture.

Another example:
http://courses.ece.illinois.edu/ece512/Papers/Itanium/isscc_2002_3s.pdf

The pre-validated tag scheme was simply ingenious, and key to achieving the
single-cycle latency. It also supported 4 mem-ops per cycle (mentioned in
the register file paper).

A waste of good talent, really.

Ned


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