Migrate from SPICE MOSFET Level 6 to BSIM4
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From: Daku on 6 May 2010 03:06 Could some SPICE guru please help ? I am using ngspice-20. I designed a phase frequency detector(2 D flip- flops and a NAND gate in feedback loop to reset the flip-flops) with SPICE level 6 NMOS and PMOS models, and simulation results were exactly as expected. I then modified the L and W values to sub-micron sizes and used the BSIM4 model from Berkeley. Now, I am not getting the expected output, as with the level 6 design. Is there something that I am missing, and is the only way to resolve this problem is to keep varying the transistor sizes (L and W) ? Any hints, suggestions would be of immense value. Thanks in advance for your help.
From: JosephKK on 9 May 2010 15:33
On Thu, 6 May 2010 00:06:43 -0700 (PDT), Daku <dakupoto(a)gmail.com> wrote: >Could some SPICE guru please help ? I >am using ngspice-20. I designed a phase frequency detector(2 D flip- >flops and a NAND gate in feedback loop to reset the flip-flops) with >SPICE level 6 NMOS and PMOS models, and simulation results were >exactly as expected. I then modified the L and W values to sub-micron >sizes and used the BSIM4 model from Berkeley. Now, I am not getting >the expected output, as with the level 6 design. Is there something >that I am missing, and is the only way to resolve this problem is to >keep varying the transistor sizes (L and W) ? Any hints, suggestions >would be of immense value. Thanks in advance for your help. Going out on a limb to the point of hanging on a few leaves, aren't there a lot more process parameters that have to be set up correctly as well? |