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From: Hammy on 28 Jul 2010 07:48 When mosfets are sharing a heatsink how does this effect the total power handling capability of the fets. For example if I calculated an allowable 140W dissipation for a single fet mounted on a large 150mm x 100mm for a max ambient of 50C and max junction of 110C With a fan 1 x 42CFM. Would it be possible to get 300 to 400W total dissipation if I parallel 2 to 4 FETS on the same heatsink? Or would I have to buy 2 or three more of the large heatsink? The mosfets are operating in linear mode it's for a variable electronic load. To avoid thermal runaway in a fet due to Vgs( th) differences between devices is it best to use dedicated opamps per fet or large source resistors? I've read several papers but thought I'd ask here for someone who has maybe done something similar.
From: Uwe Hercksen on 28 Jul 2010 08:57 Hammy schrieb: > > For example if I calculated an allowable 140W dissipation for a single > fet mounted on a large 150mm x 100mm for a max ambient of 50C and max > junction of 110C With a fan 1 x 42CFM. > > Would it be possible to get 300 to 400W total dissipation if I > parallel 2 to 4 FETS on the same heatsink? Or would I have to buy 2 or > three more of the large heatsink? Hello, if your calculation is right, two of those fets mounted on two of those heat sinks will dissipate 140 W each and 280 W together. Why do you think that one heatsink of the same size will be enough for 300 to 400 W? Bye
From: Grant on 28 Jul 2010 09:17 On Wed, 28 Jul 2010 07:48:39 -0400, Hammy <spam(a)spam.com> wrote: > > >When mosfets are sharing a heatsink how does this effect the total >power handling capability of the fets. > >For example if I calculated an allowable 140W dissipation for a single >fet mounted on a large 150mm x 100mm for a max ambient of 50C and max >junction of 110C With a fan 1 x 42CFM. > >Would it be possible to get 300 to 400W total dissipation if I >parallel 2 to 4 FETS on the same heatsink? Or would I have to buy 2 or >three more of the large heatsink? > >The mosfets are operating in linear mode it's for a variable >electronic load. > >To avoid thermal runaway in a fet due to Vgs( th) differences between >devices is it best to use dedicated opamps per fet or large source >resistors? I've read several papers but thought I'd ask here for >someone who has maybe done something similar. I put 8 x TO220 FETs direct (non-insulated) on flat aluminium plate, 3mm thick by 40mm to spread heat onto one side of 80mm square fancooled heatsink rated 0.3'C/W and could easily handle 400W, with an 8 x 0R33, 50W metal pack resistors on other side of heatsink. Two parts of the heatsink mated to form an 80mm by 200mm tunnel that one bolted a fan to, I used a 90mm fan via adapter. 0R22 source resistor too small to balance FETs better than 100%, so I selected best match eight from batch of 20, expensive and still not a good performer for intended use, okay for manual operation. If I built one like that again I'd use individual opamps, once saw a site with that method, but didn't save the reference. An opamp version with pair of LM324s didn't work very well, so I think you may need better, faster than LM324. Also tried 8 NPN transistors instead of N-channel MOSFETs, problems with drive, leakage, temperature drift :( What I ended up with was fine for a manually adjusted active load, but proved unsuitable for the power DAC I was hoping to convert it too. Got a PWM temp controlled fan, so it's quiet until driven to high power, and, it could suck 400W all day, 500w for short periods, with a temperature sensor to shutdown on overheat, of course it's not properly documented :( Many rebuilds, and the cap banks I had to hang off it for stability with some power sources like a mains commutated SCR controlled power supply, ugh! Current version power DAC I'm building is saturated FETs driving resistor banks: P channel for a hi/lo range switched resistor banks. N channel FETs for thermometer code drive for MSB 3 bits, then binary weighted resistor banks filling out to 63/64, then a couple power opamps (3A max output) catching the fine 1/64 end, another for trimming the 1% resistor bank slop. Opamps driven by dual 8bit DAC chip, entire hybrid power DAC by a PIC chip with 16bit resolution ADC for feedback. Forgot to order crystals for PIC, Grant.
From: Paul Keinanen on 28 Jul 2010 09:49 On Wed, 28 Jul 2010 07:48:39 -0400, Hammy <spam(a)spam.com> wrote: > >For example if I calculated an allowable 140W dissipation for a single >fet mounted on a large 150mm x 100mm for a max ambient of 50C and max >junction of 110C With a fan 1 x 42CFM. The total thermal resistance from junction to ambient is (110-50)/140=0.43 C/W, which sound very optimistic :-). The thermal resistance from junction to ambient Rth (j-a) consists of the thermal resistance from junction to case Rth (j-c) in series with the thermal resistance from case to ambient Rth (c-a). The thermal resistance from junction to case can be found from the transistor data sheet. Assuming that the Rth (j-c) is 0.20 C/W (what kind of package is this good?), thus Rth (c-a) would be 0.23 C/W, since 0.20+0.23=0.43 C/W >Would it be possible to get 300 to 400W total dissipation if I >parallel 2 to 4 FETS on the same heatsink? Or would I have to buy 2 or >three more of the large heatsink? Putting two transistors on the same heatsink will effectively divide the Rth(j-c) by two, but it does not affect Rth (c-a) thus Rth (j-a)= 0.20/2+0.23=0.33 C/W. Thus P=(110-50)/0.33=182 W. With 4 transistors on the same small heatsink (assuming the extra transistors do not disturb the air flow) Rth (j-a)=0.20/4+0.23=0.28 C/W and hence P=214 W.
From: John Larkin on 28 Jul 2010 10:31
On Wed, 28 Jul 2010 16:49:30 +0300, Paul Keinanen <keinanen(a)sci.fi> wrote: >Putting two transistors on the same heatsink will effectively divide >the Rth(j-c) by two, but it does not affect Rth (c-a) Actually, it might. One transistor dissipating, say, 100 watts on a heatsink will suffer from hot-spot effect, namely the heatsink lateral spreading thermal resistance. That same 100 watts shared among two transistors, at 50 watts each, would have lower case temperatures. The issue is that heatsinks are usually specified assuming a uniform heat load, but transistors are very local spots of heat. The thinner the baseplate, the worse hot-spots get. John |