NE612 mixer: input/output impedance in balanced mode?
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From: Andrew Holme on 23 Nov 2008 18:59 "sparks" <jeff_164(a)hotmail.com> wrote in message news:053ffdfd-9549-449e-8c95-cc0a37e4984f(a)e1g2000pra.googlegroups.com... > Hi, > Could someone please clarify the input and output impedance > requirements when using the NE162 in a balanced configuration - that > is using a balanced transformer at the input (pins1&2) and output > (pins 4&5). > The datasheet mentions 1.5K impedance at each input and output > terminal, but does this mean a transformer would need to step up a 50 > ohm unbalanced source to 3K ohms (balanced) to feed the two input > pins, and vice versa to step the output down to 50 ohms. Ive seen > circuits on the Net which imply the high impedance winding of both > transformers was 1.5K and another circuit that implies a 3K ohm centre > tapped winding where the CT goes to Vcc on the O/P transformer. All a > bit confusing... > thanks, > JEFF > The device numbers are NE602, NE612, SA602, SA612. Each input looks like 1k5 || 3pF. The differential input impedance is 3k. The single-ended output impedance at pin 4 or pin 5 is 1k5 and the differential output impedance is 3k. The output transformer CT need not be connected to Vcc. Here's an unbalanced input matching simulation for LTSpice: Version 4 SHEET 1 880 680 WIRE 208 32 96 32 WIRE 608 32 208 32 WIRE 96 48 96 32 WIRE 208 80 208 32 WIRE -96 144 -208 144 WIRE 96 144 96 112 WIRE 96 144 -16 144 WIRE 96 176 96 144 WIRE 208 224 208 160 WIRE 368 224 208 224 WIRE 480 224 368 224 WIRE 608 224 608 32 WIRE 736 224 608 224 WIRE -208 240 -208 144 WIRE 368 240 368 224 WIRE 480 240 480 224 WIRE 608 240 608 224 WIRE 736 240 736 224 WIRE 96 272 96 240 WIRE 208 272 208 224 WIRE 208 272 96 272 WIRE 208 288 208 272 WIRE 368 336 368 320 WIRE 480 336 480 304 WIRE 608 336 608 320 WIRE 736 336 736 304 WIRE -208 352 -208 320 WIRE 208 384 208 352 FLAG -208 352 0 FLAG 368 336 0 FLAG 608 336 0 FLAG 208 384 0 FLAG 480 336 0 FLAG 736 336 0 SYMBOL ind 192 64 R0 SYMATTR InstName L1 SYMATTR Value 290n SYMATTR SpiceLine Rser=1 SYMBOL cap 80 48 R0 SYMATTR InstName C1 SYMATTR Value 47p SYMBOL cap 80 176 R0 SYMATTR InstName C2 SYMATTR Value 220p SYMBOL cap 192 288 R0 SYMATTR InstName C3 SYMATTR Value 100n SYMBOL res 352 224 R0 SYMATTR InstName R1 SYMATTR Value 1k5 SYMBOL res 592 224 R0 SYMATTR InstName R2 SYMATTR Value 1k5 SYMBOL res 0 128 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R3 SYMATTR Value 50 SYMBOL voltage -208 224 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value SINE(0 1m 45e6) SYMBOL cap 720 240 R0 SYMATTR InstName C4 SYMATTR Value 3p SYMBOL cap 464 240 R0 SYMATTR InstName C5 SYMATTR Value 3p TEXT 358 120 Left 0 !.tran 1u
From: sparks on 23 Nov 2008 19:15
Thanks Andrew for your help (again). That clarifies if for me. regards from 'down under", JEFF > > The device numbers are NE602, NE612, SA602, SA612. > > Each input looks like 1k5 || 3pF. The differential input impedance is 3k. > > The single-ended output impedance at pin 4 or pin 5 is 1k5 and the > differential output impedance is 3k. > > The output transformer CT need not be connected to Vcc. > > Here's an unbalanced input matching simulation for LTSpice: > |