[PATCH 4/7] perf, x86: implement IBS feature detection
in [Kernel]
|
Prev: [PATCH 2/7] perf, x86: introduce bit range for special pmu events
Next: [PATCH 5/7] perf, x86: setup NMI handler for IBS
From: Robert Richter on 19 May 2010 17:50 The new code checks if IBS is available on the cpu. It implements only a basic detection that should be later extended to read ibs cpuid feature flags. Signed-off-by: Robert Richter <robert.richter(a)amd.com> --- arch/x86/kernel/cpu/perf_event.c | 5 +++++ arch/x86/kernel/cpu/perf_event_amd.c | 2 ++ 2 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index e64502c..e186d3b 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c @@ -244,6 +244,11 @@ struct x86_pmu { */ unsigned long lbr_tos, lbr_from, lbr_to; /* MSR base regs */ int lbr_nr; /* hardware stack size */ + + /* + * AMD IBS + */ + int ibs; /* cpuid flags */ }; static struct x86_pmu x86_pmu __read_mostly; diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c index 87e5ae4..cda8475 100644 --- a/arch/x86/kernel/cpu/perf_event_amd.c +++ b/arch/x86/kernel/cpu/perf_event_amd.c @@ -405,6 +405,8 @@ static __init int amd_pmu_init(void) return -ENODEV; x86_pmu = amd_pmu; + if (boot_cpu_has(X86_FEATURE_IBS)) + x86_pmu.ibs = 1; /* Events are common for all AMDs */ memcpy(hw_cache_event_ids, amd_hw_cache_event_ids, -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ |