Processes' memory
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From: Anne & Lynn Wheeler on 2 Feb 2010 10:33 "Del Cecchi" <delcecchi(a)gmail.com> writes: > Played with it? heck, helped with design. They wanted to use blue > illiad and got mad when we proposed a gate array alternative. re: http://www.garlic.com/~lynn/2010c.html#28 Processes' memory SCAMP 1973 at palo alto science center 1973, 5100 PALM was follow-on/evolution in 1975 http://en.wikipedia.org/wiki/IBM_5100 Palo Alto Science Center also did apl\cms on vm370 (follow-on to cms\apl that cambridge science center did for cp67/cms) and the apl\cms microcode assist for 370/145. http://en.wikipedia.org/wiki/APL_%28programming_language%29 all long before blue iliad (specific 32bit 801 risc chip design, large, hot, etc) old email about blue iliad going to mfg FEB82 for 1st pass parts (5100 was withdrawn Mar82): http://www.garlic.com/~lynn/2006u.html#email810422 in this old post http://www.garlic.com/~lynn/2006u.html#38 To RISC or not to RISC other old email mentioning 801, Iliad, ROMP, Fort Knox, RIOS, risc, et http://www.garlic.com/~lynn/lhwemail.html#801 Originally, AS/400 planned on using a 801/risc Iliad chip. i had a proposal for racks of large numbers of (arbitrary mix) 801 risc blue iliad (about 20mips) and boeblingen's 3chip 370 (about 3mips) ... a couple recent references http://www.garlic.com/~lynn/2010c.html#20 Processes' memory http://www.garlic.com/~lynn/2010c.html#21 Processes' memory http://www.garlic.com/~lynn/2010c.html#43 PC history, was search engine history, was Happy DEC-10 Day other posts in this thread: http://www.garlic.com/~lynn/2010c.html#4 Processes' memory http://www.garlic.com/~lynn/2010c.html#5 Processes' memory http://www.garlic.com/~lynn/2010c.html#14 Processes' memory http://www.garlic.com/~lynn/2010c.html#15 Processes' memory http://www.garlic.com/~lynn/2010c.html#17 Processes' memory http://www.garlic.com/~lynn/2010c.html#18 Processes' memory http://www.garlic.com/~lynn/2010c.html#19 Processes' memory http://www.garlic.com/~lynn/2010c.html#24 Processes' memory http://www.garlic.com/~lynn/2010c.html#25 Processes' memory http://www.garlic.com/~lynn/2010c.html#35 Processes' memory http://www.garlic.com/~lynn/2010c.html#36 Processes' memory -- 42yrs virtualization experience (since Jan68), online at home since Mar1970
From: Anne & Lynn Wheeler on 2 Feb 2010 10:40 Anne & Lynn Wheeler <lynn(a)garlic.com> writes: > Palo Alto Science Center also did apl\cms on vm370 (follow-on to cms\apl > that cambridge science center did for cp67/cms) and the apl\cms > microcode assist for 370/145. > http://en.wikipedia.org/wiki/APL_(programming_language) re: http://www.garlic.com/~lynn/2010c.html#54 Processes' memory semi-related subject ... ECPS was vm370 microcode assist for 138/148 (follow-on to 135/145) where parts of the vm370 kernel were moved into microcode. several traces of vm370 kernel activity was used to determine instruction "hot-spots" for candidates to be moved into microcode. one technology was extensive instrumentatation of the vm370 kernel with time-stamped traces. another was a special microcode load for 370/145 .... that periodically sampled kernel instruction address ... and had a table of counts for instruction lines that was updated ... and periodically dumped to software. The 370/145 microcode change was done by the same person that did the 370/145 apl\cms microcode enhancement. http://www.garlic.com/~lynn/94.html#21 370 ECPS VM microcode assist http://www.garlic.com/~lynn/94.html#27 370 ECPS VM microcode assist http://www.garlic.com/~lynn/94.html#28 370 ECPS VM microcode assist -- 42yrs virtualization experience (since Jan68), online at home since Mar1970
From: Anne & Lynn Wheeler on 2 Feb 2010 15:33 "Del Cecchi" <delcecchi(a)gmail.com> writes: > Played with it? heck, helped with design. They wanted to use blue > illiad and got mad when we proposed a gate array alternative. there were other projects that were to use some iliad chip or another. there was major corporate initiative the end of 70s to migrate large variety of different corporate microprocessors to 801/risc architectures .... including the entry & mid-range (microprogrammed) 370s. this included the 4331/4341 follow-ons; 4361 & 4381. I contributed to white paper that "killed" that for 4381. Entry & mid-range 370s had been implemented on wide-variety of different microprocessors ... that tended to "avg" 10 microprocessor instruction per 370 instruction; this was behind the previously mentioned "ECPS" vm370 microcode assist .... basically a one-for-one translation of vm370 kernel 370 instruction into microprocessor instruction ... achieving 10:1 improvements for those pathlengths. http://www.garlic.com/~lynn/2010c.html#55 Processes' memory the whitepaper that killed the Iliad effort for 4381 pointed out that chip technology was getting to the point that nearly all of the 370 instructions could be implemented directly in silicon ... which would result in much more cost effective implementation than retaining the microcoded emulation paradigm using 801/risc Iliad. it was the shutdown of various of those (early) 801/risc efforts that resulted in some number of the 801/risc engineers leaving and showing up at other vendors in the early 80s. the technology trade-off arguments more recently shifted ... where the investment in chip thruput because of enormous volumes ... outweighs what could be invested in much smaller 370 chip volume (if there was still entry/mid-range market for 370s). there was some comment recently in ibm-main mailing list estimating that there might be as few as 4000 high-end 370 installations (and the several tens of thousands of entry & mid-range 370s have all disappeared) ... and there are been some software 370 emulation (effectively quite similar to the oldtime microcoded implementation) getting relatively decent thruput. misc. past posts mentioning 360/370 m'code http://www.garlic.com/~lynn/subtopic.html#mcode -- 42yrs virtualization experience (since Jan68), online at home since Mar1970
From: Charles Richmond on 2 Feb 2010 17:17
Michael Wojcik wrote: > EricP wrote: >> Anne & Lynn Wheeler wrote: >>> EricP <ThatWouldBeTelling(a)thevillage.com> writes: >>>> I can't say about it running System/370 but it was out of >>>> the lab, though perhaps not an "announced product", because >>>> IPSA had their APL up and running on PC/370 in the early 1980's. >>>> I wasn't involved so can't provide details of the port. >>> the ibm 5100 PC ... 1975 precusor to 5150 pc ... did 370 emulation for >>> running port of apl\360. >>> http://en.wikipedia.org/wiki/IBM_5100 >>> >>> above mentions 5100 pc use a simplified version of 370 apl.sv >> I believe it was called the XT/370 - a plug in card for the PC/XT >> with the pair of re-microcoded 68000's. It was a product in 1983. > > No - Lynn's talking about the 5100 from 1975, long before the 5150 > (the original IBM PC) was announced. Nothing to do with the PC XT/370. > > The 5100 was a PALM-based machine that evolved from the SCAMP > prototype, and was intended as a small APL machine (though the > Wikipedia article says it also ran a BASIC interpreter based on the > one for the System/3). > ISTM that the IBM 5100 had an IBM 1130 emulator in it, and ran 1130 APL rather than a native code interpreter. That made it rather slow running APL. -- +----------------------------------------+ | Charles and Francis Richmond | | | | plano dot net at aquaporin4 dot com | +----------------------------------------+ |