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From: Robert Myers on 21 Apr 2010 12:02 I have several times referred to a paper by Patterson, et al, circa 1996 that concludes that most architectural cleverness is useless for OLTP workloads, but I have been unable to deliver a specific citation. It turns out that Patterson is the second author and the technical report from Berkeley is from 1998: www.eecs.berkeley.edu/Pubs/TechRpts/1998/CSD-98-1001.pdf Performance Characterization of a Quad Pentium Pro SMP Using OLTP Workloads by Kimberly Keeton*, David A. Patterson*, Yong Qiang He+, Roger C. Raphael+, and Walter E. Baker#. If Intel management read this report, and I assume it did, it would have headed in the direction that Andy has lamented: lots of simple cores without energy-consuming cleverness that doesn't help much, anyway--at least for certain kinds of workloads. The only thing that really helps is cache. Even though the paper distinguishes between technical and commercial workloads, and draws its negative conclusion only for commercial workloads, it was interesting to me that, for instance, Blue Gene went the same direction--many simple processors--for a technical workload so as to achieve low power operation. Robert. |