ROMmability
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From: EricP on 4 Aug 2010 11:40 robertwessel2(a)yahoo.com wrote: > On Aug 2, 4:47 pm, EricP <ThatWouldBeTell...(a)thevillage.com> wrote: >> Andy Glew wrote: >>> ROMmability refers to the ability to place the stuff needed by a >>> computer system that must reside in memory - e.g. instructions, data, >>> page tables - in ROM, read-only memory. >> This is dated, but... >> >> = Instruction Set = >> >> >> Data General Nova Input and Output instructions were similar, >> and IIRC also IBM 360 START CHANNEL, in only allowing immediate >> constant port address. While neither was interested in ROMability, >> performing arbitrary port I/O required generating and executing >> self modifying code which interacts with prefetch buffers. >> They later added register variants of I/O instructions. > > > S/360 Start I/O (SIO), and the Start Subchannel (SSCH) that replaced > it with the big revamp of the I/O subsystem in XA, both used registers > to address the device. With SIO (and its variants), the base > +displacement in the instruction specified the device, so you could > actually hard code a device address (so long as it was less the > 0xfff), but that immediate value was always added to the specified > register (with the usual register zero exception). A problem was that > a word in low memory (the Channel Address Word) was used to specify > the start of the channel program and some options. > > With SSCH on XA and later, the model changed, and the I/O device is > always specified with a value in GPR1, and the address in the > instruction points to the Operation Request Block (which basically > replaces and significantly extends the CAW), so there are fewer > reentrancy issues. > > But there has never been a requirement to modify code to do mainstream > I/O on S/360 and its descendents. One minor exception that I know of > is the Direct Control facility that was an option on some S/370s (I > don't believe that was ever supported on any XA or later machines), > which basically added a parallel port to the machine. There was > provision for an eight bit output (which could be used to address one > of 256 ports) which came from an immediate field in the two > instructions in question. But that was a minor facility at best. Yeah, you are right. I had been told that was a limitation years ago and just accepted it. But looking at a 360 PofO now and it clearly does have a register field in the instruction. We were porting some Fortran 77 from VAX/VMS to a 4381 running VM/CMS and were investigating some "reentrancy issues" we encountered. We were looking at some disassembled code that was doing a Formatted I/O (probably a file record write). The compiler output code that generated the SIO into a slot just ahead of the program counter and then executed it. I asked the resident expert why it was doing that and was told that it was the way things had to be done on older machines that couldn't handle SIO's at general addresses, and the compiler just hadn't been updated. But now looking at the 360 SIO description clearly that was not the reason for that compiler to do what it did. So that 360 reference should be stricken from my remark. I also checked the Nova instructions and it was as I said - I/O instruction had constant port numbers only. There it was necessary to generate an I/O instruction and execute it if you wanted an arbitrary port. Eric
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