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From: Grant on 10 Jun 2010 19:37
On Thu, 10 Jun 2010 08:40:40 -0500, John Fields <jfields(a)austininstruments.com> wrote:

>On Thu, 10 Jun 2010 11:06:14 +1000, Grant <omg(a)grrr.id.au> wrote:
>
>>On Wed, 09 Jun 2010 18:09:58 -0500, John Fields <jfields(a)austininstruments.com> wrote:
>>
>>>On Wed, 9 Jun 2010 11:10:48 -0400, WangoTango
>>><Asgard24(a)mindspring.com> wrote:
>>>
>>>>In article <8790dlFq3jU1(a)mid.dfncis.de>, hercksen(a)mew.uni-erlangen.de
>>>>says...
>>>>>
>>>>>
>>>>> Grant schrieb:
>>>>>
>>>>> > input output (no zero)
>>>>> > a b c 7 6 5 4 3 2 1
>>>>> > 0 0 0 0 0 0 0 0 0 0
>>>>> > 0 0 1 0 0 0 0 0 0 1
>>>>> > 0 1 0 0 0 0 0 0 1 1
>>>>> > 0 1 1 0 0 0 0 1 1 1
>>>>> > 1 0 0 0 0 0 1 1 1 1
>>>>> > 1 0 1 0 0 1 1 1 1 1
>>>>> > 1 1 0 0 1 1 1 1 1 1
>>>>> > 1 1 1 1 1 1 1 1 1 1
>>>>>
>>>>> Hello,
>>>>>
>>>>> this can be done very easily using a PAl or GAL. I would use a GAL16V8
>>>>> if they are still available, I just looked into a data book from 1990.
>>>>> As time goes by....
>>>>>
>>>>> Bye
>>>>
>>>>I was thinking the same thing, and they are still available.
>>>>We still use them in some older products that use them for memory map
>>>>decoding. A quick truth table in CUPL or ABEL and you are done. I even
>>>>think Lattice has a freebie tool set on their website.
>>>>
>>>>Hell. even a small prom would do the trick.
>>>>Lots of ways to skin this cat.
>>>
>>>---
>>>Even this one, if one were so inclined:
>>>
>>>news:tb7016lr1d4cvjq6dfbsqgagtfi7uhhivh(a)4ax.com
>>>
>>Something very like that, yes. If I decide on making a rough power
>>circuit tester with an error comparator and up-down counter --> it's
>>what I was thinking of, but I was hoping to skip all those diodes :)
>>
>>Sure, it's the obvious (one off) solution, but one certainly couldn't
>>call it 'elegant' ;^) But then the resistor banks I'm making for this
>>wont be elegant either. A little tower stacked up over a 120mm fan,
>>fabricated from blank PCB. Something to do, 'cos I don't always get
>>the same enjoyment writing code.
>
>---
>If all you want is a switchable load box then, arguably, the easiest
>way to do it would be to use resistors weighted in a binary sequence
>driven by a counter's Qs.

Oh sure, that's where this started, but...

The decoder is used for MSB weighted resistors in the bank to reduce
maximum switching glitch from 1/2 to 1/8 fullscale, also lets me use
MOSFETs without heatsinks, though that's a weaker argument 'cos I
could have paralleled some for the MSBs anyway.

The remaining mid LSBs have binary weighted resistors down to about
0.5A; a power opamp (LM675T) will take up the remaining minor LSBs,
cover up the slop from using 5% resistors in the power resistor bank,
and cover up the switching transients.

The output terminals present near DC quiet to around mV levels, have
a very gentle dV/dt.

Previous prototypes used a linear approach (like half a big audio
power amp -- eight pass transistors on a live 0.3'C/W heatsink) but
they drifted over temperature and would not perform down to the
small mV levels like I wanted.

So this is a hybrid approach with isolated drive to the big power
stuff, and a PIC to get the fine control end where I want it.

Besides, specs changed over the time I been looking at this, now
the 'client' wants set'n'forget operation which requires a sample
hold to remember nearest mV (1:40k resolution) for several hours,
and generation of mV/minute ramp rates -- stuff I'd be mad to try
implementing totally analog ;)

Grant.
--
http://bugs.id.au/
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