Software PLL
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From: smc123 on 15 Apr 2010 18:31 I'm looking for guidance on writing a software PLL for a signal acquired from a data acquisition board: The daq board will be sampling at 10kSPS. The signals to which I'd like to lock on to are from 5Hz to 1kHz, sine or square wave. The output of the PLL will be used to multiply a signal acquired on an adjacent channel of the daq board. Lock-in amplifier application. The processing of the signals will be done on a PC-based software app. Thanks for your help
From: Tim Wescott on 15 Apr 2010 22:32 smc123 wrote: > I'm looking for guidance on writing a software PLL for a signal acquired > from a data acquisition board: > The daq board will be sampling at 10kSPS. > The signals to which I'd like to lock on to are from 5Hz to 1kHz, sine or > square wave. > The output of the PLL will be used to multiply a signal acquired on an > adjacent channel of the daq board. Lock-in amplifier application. > The processing of the signals will be done on a PC-based software app. Do you know anything about phase locked loops? If no, then say so, and/or hit the books (Floyd Gardner's book is highly regarded, I prefer Dan Wolavar's book but only because I took the class from him). There may be more modern books that include digital PLL theory, but if you understand analog PLLs you can do the digital ones. Are there interfering signals? Is there noise? If no and no, then get your NCO close by detecting zero crossings, then lock to the pilot tone by multiplying by the NCO output and averaging. I suggest you average the phase detector output by an integer number of cycles of the NCO; this will limit your loop bandwidth when the pilot tone is at 5Hz, but just about anything will. Does the pilot tone have a substantially constant amplitude? If yes, you're done. If no, then cook up some sort of AGC, because otherwise loop stability and lock-in time will be an issue. -- Tim Wescott Control system and signal processing consulting www.wescottdesign.com
From: HardySpicer on 16 Apr 2010 01:54 On Apr 16, 10:31 am, "smc123" <xmacleod(a)n_o_s_p_a_m.yahoo.com> wrote: > I'm looking for guidance on writing a software PLL for a signal acquired > from a data acquisition board: > The daq board will be sampling at 10kSPS. > The signals to which I'd like to lock on to are from 5Hz to 1kHz, sine or > square wave. > The output of the PLL will be used to multiply a signal acquired on an > adjacent channel of the daq board. Lock-in amplifier application. > The processing of the signals will be done on a PC-based software app. > > Thanks for your help Ok first you need a signal with no Amplitude variations. Could use a hard limiter but this is not good at low SNR's. Could use a fast acting AGC of some sort. Then you need a VCO in software - easy to do. A multiplier will do for the phase detector and then the tricky bit. You need to know a bit about stabilising feedback loops. Suggest the simplest type of Loop - a type 1! The VCO acts as a pure integrator Kv/s where Kv is the oscillator constant (you may need to find this!). Then use a low-pass filter + gain K/ (1+sT) where T is the time-constant and K is a gain. You must plot a Bode-plot and decide what freq unity gain crossover freq you need. Anyway - do some reading first... Hardy
From: HardySpicer on 16 Apr 2010 01:55 On Apr 16, 2:32 pm, Tim Wescott <t...(a)seemywebsite.now> wrote: > smc123 wrote: > > I'm looking for guidance on writing a software PLL for a signal acquired > > from a data acquisition board: > > The daq board will be sampling at 10kSPS. > > The signals to which I'd like to lock on to are from 5Hz to 1kHz, sine or > > square wave. > > The output of the PLL will be used to multiply a signal acquired on an > > adjacent channel of the daq board. Lock-in amplifier application. > > The processing of the signals will be done on a PC-based software app. > > Do you know anything about phase locked loops? > > If no, then say so, and/or hit the books (Floyd Gardner's book is highly > regarded, I prefer Dan Wolavar's book but only because I took the class > from him). There may be more modern books that include digital PLL > theory, but if you understand analog PLLs you can do the digital ones. > > Are there interfering signals? > > Is there noise? > > If no and no, then get your NCO close by detecting zero crossings, then > lock to the pilot tone by multiplying by the NCO output and averaging. > I suggest you average the phase detector output by an integer number of > cycles of the NCO; this will limit your loop bandwidth when the pilot > tone is at 5Hz, but just about anything will. > > Does the pilot tone have a substantially constant amplitude? > > If yes, you're done. If no, then cook up some sort of AGC, because > otherwise loop stability and lock-in time will be an issue. > > -- AGC's are typically low bandwidth and do not have any effect on the envelope. (they do scale the overall waveform of course) You can up the gain however and crush the envelope ie flatten it. Hardy
From: Vladimir Vassilevsky on 16 Apr 2010 09:36
smc123 wrote: > I'm looking for guidance on writing a software PLL for a signal acquired > from a data acquisition board: http://www.compdsp.com/presentations/Jacobsen/abineau_dpll_analysis.pdf Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com |