What will Microsoft use its ARM license for?
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From: Peter Dickerson on 28 Jul 2010 05:45 "Andy Glew" <"newsgroup at comp-arch.net"> wrote in message news:rvmdnZIEBPRfPdLRnZ2dnUVZ_vqdnZ2d(a)giganews.com... > On 7/27/2010 11:34 AM, jgd(a)cix.compulink.co.uk wrote: >> In article >> <284da124-7934-42bb-a58c-899a935a04ce(a)5g2000yqz.googlegroups.com>, >> gnirre(a)gmail.com (gnirre) wrote: >> >>> Will Microsofts [sic] design an ARM processor? >> >> I doubt it very much. They probably want to put an ARM with custom >> peripherals onto a chip in some piece of equipment. They do sell quite a >> lot of electronics in various forms: this could well go into a Zune >> successor, for example. > > If that was what they wanted, they could have bought a much cheaper > license, that allows them to use an existing ARM core design, and build an > SOC out of it. > > Instead, according to reports ARM has bought an architecture license, that > allows them to create their own completely different CPU design. Different > CPU pipeline. I'm not sure, but I believe it may allow them to create a > 64 bit implementation (probably with ARM agreeing on the ISA details). IIRC the arch license that DEC had (which went to Marvell via Intel?) allowed them to build there own implementation of the architechture but specifically prohibited proprietory architectural extensions tat would fragment the ARM brand. Peter
From: Andrew Reilly on 28 Jul 2010 08:43 On Wed, 28 Jul 2010 10:45:16 +0100, Peter Dickerson wrote: > specifically prohibited proprietory architectural extensions tat would > fragment the ARM brand. That can't have worked very well then, because Intel added the MMX instruction set to XScale. I can't remember whether the original DEC StrongARM had extra instructions beyond the ARM ARM of the day. Havning single-cycle multiplies certainly changes the sorts of code that you can usefully write, though. Cheers, -- Andrew
From: Paul Gotch on 28 Jul 2010 08:59 Andrew Reilly <areilly---(a)bigpond.net.au> wrote: > On Wed, 28 Jul 2010 10:45:16 +0100, Peter Dickerson wrote: > That can't have worked very well then, because Intel added the MMX > instruction set to XScale. No they didn't. They added a 'Wireless MMX' coprocessor. Historically any licensee has been allowed to add coprocessors which appear in the coprocessor opcode space. This does not count as changing the ISA. These days high performance ARMs don't have an externally visible coprocessor bus so in order to actually add stuff in the coprocessor space you'd need a suitable license to be able to do your own implementation or modify the RTL as supplied by ARM. > I can't remember whether the original DEC StrongARM had extra > instructions beyond the ARM ARM of the day. Havning single-cycle > multiplies certainly changes the sorts of code that you can usefully > write, though. StrongARM was a pure v4 implementation. -p -- Paul Gotch --------------------------------------------------------------------
From: Noob on 28 Jul 2010 10:56 gnirre wrote: > By the way, what characteristics does the Apple ARM Cortex > A8-processor Apple A4 have? Is this known? Here are a few possibly relevant links. http://www.eetimes.com/electronics-news/4200451/Apple-s-A4-dissected-discussed--and-tantalizing http://www.chipworks.com/A4_is_Samsung_45nm.aspx http://en.wikipedia.org/wiki/Apple_A4 Regards.
From: jgd on 1 Aug 2010 09:05
In article <Qwz*KV9et(a)news.chiark.greenend.org.uk>, paulg(a)at-cantab-dot.net (Paul Gotch) wrote: > The Cortex-A8 is not multi core capable, so that's rather unlikely. Apologies; got it mixed up with Cortex-A9. Shouldn't trust memory on this stuff. -- John Dallman, jgd(a)cix.co.uk, HTML mail is treated as probable spam. |