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From: Brett on 28 Feb 2010 21:41
Die photos of Sandy Bridge are out, its a thin rectangle in shape:
http://www.semiaccurate.com/2010/02/27/look-intels-upcoming-sandy-bridge/
I had assumed that a square die would get you the best count out of a round
wafer, but Intel always seems to favor thin rectangles.
This perhaps makes dual cavity chip carriers smaller and/or cheaper, but I
cannot think that the fake 8 core version of this chip is really going to
sell more than token units, so it cannot decide the shape of the volume
product. Right?
Does look like you can make a dual core 4 meg cache version with ease, but
even that cut down version will be a thin rectangle. (I bet that empty area
to the bottom left really is empty....)
So why thin rectangles?
Brett

From: MitchAlsup on 1 Mar 2010 11:50
On Feb 28, 8:41 pm, Brett <gg...(a)yahoo.com> wrote:
> Die photos of Sandy Bridge are out, its a thin rectangle in shape:http://www.semiaccurate.com/2010/02/27/look-intels-upcoming-sandy-bri...
> I had assumed that a square die would get you the best count out of a round
> wafer, but Intel always seems to favor thin rectangles.

It looks to me like the die is about twice as wide as it is tall. And
at 225 sq mm, this gives us dimensions of about 22*10. Now,
convienently, two 22*10 dies will fit in a single 22*22 reticle.

> This perhaps makes dual cavity chip carriers smaller and/or cheaper, but I
> cannot think that the fake 8 core version of this chip is really going to
> sell more than token units, so it cannot decide the shape of the volume
> product. Right?

Packages can be made in just about any aspect ratio without any
(unuseful) change in the cost structure of the package.

The other thing to note is that the graphics core is 3X as big as the
x86 core.

Mitch

From: Terje Mathisen "terje.mathisen at on 1 Mar 2010 13:12
MitchAlsup wrote:
> Packages can be made in just about any aspect ratio without any
> (unuseful) change in the cost structure of the package.
>
> The other thing to note is that the graphics core is 3X as big as the
> x86 core.

That was the one really interesting thing on that die photo:

Even with a very non-bleeding edge gpu, said gpu is far larger than any
of those x86 cores which many people here claim to be too complicated.

Terje

--
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"
From: Robert Myers on 1 Mar 2010 15:06
On Mar 1, 1:12 pm, Terje Mathisen <"terje.mathisen at tmsw.no"> wrote:
> MitchAlsup wrote:
> > Packages can be made in just about any aspect ratio without any
> > (unuseful) change in the cost structure of the package.
>
> > The other thing to note is that the graphics core is 3X as big as the
> > x86 core.
>
> That was the one really interesting thing on that die photo:
>
> Even with a very non-bleeding edge gpu, said gpu is far larger than any
> of those x86 cores which many people here claim to be too complicated.
>
Given the bandwidth wall, which, unlike the latency wall, can't be
fudged, what *can* you do with these chips besides graphics where you
pound the living daylights out of a small dataset.

Network and disk-bound applications can use many cores in server
applications, but that's obviously not what this chip is aimed at.

Robert.
From: Del Cecchi on 1 Mar 2010 20:05
Robert Myers wrote:
> On Mar 1, 1:12 pm, Terje Mathisen <"terje.mathisen at tmsw.no"> wrote:
>> MitchAlsup wrote:
>>> Packages can be made in just about any aspect ratio without any
>>> (unuseful) change in the cost structure of the package.
>>> The other thing to note is that the graphics core is 3X as big as the
>>> x86 core.
>> That was the one really interesting thing on that die photo:
>>
>> Even with a very non-bleeding edge gpu, said gpu is far larger than any
>> of those x86 cores which many people here claim to be too complicated.
>>
> Given the bandwidth wall, which, unlike the latency wall, can't be
> fudged, what *can* you do with these chips besides graphics where you
> pound the living daylights out of a small dataset.
>
> Network and disk-bound applications can use many cores in server
> applications, but that's obviously not what this chip is aimed at.
>
> Robert.
Isn't that backwards? bandwidth costs money, latency needs miracles.
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