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From: Joerg Wagner on 7 Feb 2007 03:47
Hello,

various sources speak of early Opterons missing the cmpxchg16 instruction (in fact, I have one, but it's running Linux).
Will Win64 emulate that instruction on these systems (trapping the unknown opcode and use a spin lock) ?
As the documentation of the VC8 compiler tells me, VC++ will emit a direct opcode, whenever I use InterlockedCompareExchange128, so I am in sorrow if my code will still work on these exotic machines ...

Any help appreciated !

Joerg
From: Joerg Wagner on 7 Feb 2007 07:55
Sorry, there is no InterlockedCompareExchange128() intrinsic function (why ?), so the question reduces to the opcode problem. Is Win64 able to handle this gracefully ?

Joerg
From: Scherbina Vladimir on 7 Feb 2007 17:24
Where did you found that Opteron does not support CMPXCHG16 (0F C7)
instruction? The document
http://www.scs.stanford.edu/05au-cs240c/lab/amd64/AMD64-3.pdf says it's
supported.

> Sorry, there is no InterlockedCompareExchange128() intrinsic function (why
> ?)

Most likely, it is not required now. 32 and 64 are enough.


--
Vladimir

From: Joerg Wagner on 8 Feb 2007 02:51
> Where did you found that Opteron does not support CMPXCHG16 (0F C7)
> instruction? The document
> http://www.scs.stanford.edu/05au-cs240c/lab/amd64/AMD64-3.pdf says it's
> supported.
Well, I have a couple of ones standing here, where CPUID is missing the feature bit and cmpxchg16 generates SIGILL.
Unfortunately I cannot install Win64 on them to try out if the OS will "emulate" (as best as it can) the instruction.

>> Sorry, there is no InterlockedCompareExchange128() intrinsic function
>> (why ?)
>
> Most likely, it is not required now. 32 and 64 are enough.
Not for me, 64bit CAS on a 64 bit system is (for the case of x86) not enough to solve certain problems in concurrent algorithms :/
Never thought about why this instruction was build in ?

Joerg
From: Scherbina Vladimir on 8 Feb 2007 10:47
I see. Most likely you will see "Unhandled exception at address in
ng_test.exe: address: Illegal Instruction."

--
Vladimir
"Joerg Wagner" <wagner(a)cs.tu-berlin.de> wrote in message
news:Oc2JaX1SHHA.4276(a)TK2MSFTNGP02.phx.gbl...
>> Where did you found that Opteron does not support CMPXCHG16 (0F C7)
>> instruction? The document
>> http://www.scs.stanford.edu/05au-cs240c/lab/amd64/AMD64-3.pdf says it's
>> supported.
> Well, I have a couple of ones standing here, where CPUID is missing the
> feature bit and cmpxchg16 generates SIGILL.
> Unfortunately I cannot install Win64 on them to try out if the OS will
> "emulate" (as best as it can) the instruction.
>
>>> Sorry, there is no InterlockedCompareExchange128() intrinsic function
>>> (why ?)
>>
>> Most likely, it is not required now. 32 and 64 are enough.
> Not for me, 64bit CAS on a 64 bit system is (for the case of x86) not
> enough to solve certain problems in concurrent algorithms :/
> Never thought about why this instruction was build in ?
>
> Joerg

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