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From: Yzordderrex on 15 Oct 2009 10:34
I am looking at doing a half-bridge LLC resonant converter design.
Fairchild appnote AN-4151

Turn-on is not a problem as it is into zero voltage as the lagging
current commutates the current before the Fet turns on.

I am wondering if placing a small capacitor (100pf-1000pf) across the
Drain-Source might help to reduce transistor losses when turning off.
It seems to me that at turn-off the transistor can see higher voltage
and currents at the same time. If the current were allowed to
commutate to the capacitor during turn-off then wouldn't the
transistor run cooler?

It seems too easy. Am I missing something here.

Regards,
Bob
N9NEO
From: ChrisQ on 15 Oct 2009 12:51
Yzordderrex wrote:
> I am looking at doing a half-bridge LLC resonant converter design.
> Fairchild appnote AN-4151
>
> Turn-on is not a problem as it is into zero voltage as the lagging
> current commutates the current before the Fet turns on.
>
> I am wondering if placing a small capacitor (100pf-1000pf) across the
> Drain-Source might help to reduce transistor losses when turning off.
> It seems to me that at turn-off the transistor can see higher voltage
> and currents at the same time. If the current were allowed to
> commutate to the capacitor during turn-off then wouldn't the
> transistor run cooler?
>

The only problem you get with a cap directly across the device is that
at a few tens of nS switching time for the fet, it becomes a series
tuned circuit with it's associated lead and track lengths. You could get
ringing that exceeds the drain source voltage limit for the device and
also have to consider the losses through the cap itself, which will need
to be dv/dt rated. The usual snubber design uses either a series cr
across the device, or a fast diode coupled to a cr circuit between hv+
and ground.

Have done a little work on hv bridge inverters and the key to stop
ringing is to keep all tracks as short as pos (vhf radio techniques) and
use polypropylene type caps for hv+ decoupling as close as possible to
the device. Also, optimise the switching time of the device by gate
drive control, usually via a series resistor, which also damps the tuned
circuit formed by the Cg-s and track lengths. The gate drive power can
be quite significant as the Cgs is typically 100's of pF. The losses
through the device itself shouldn't be significant if you get the rest
of it right, though I found it all a bit of a of a black art to start with.

Both IR and Fairchild had loads of app notes on this sort of stuff last
time I looked...

Regards,

Chris
From: Tim Williams on 15 Oct 2009 20:30
On Oct 15, 9:34 am, Yzordderrex <powersupply...(a)netzero.net> wrote:
> I am wondering if placing a small capacitor (100pf-1000pf) across the
> Drain-Source might help to reduce transistor losses when turning off.
> It seems to me that at turn-off the transistor can see higher voltage
> and currents at the same time.  If the current were allowed to
> commutate to the capacitor during turn-off then wouldn't the
> transistor run cooler?
>
> It seems too easy. Am I missing something here.

That's basically it, though you have two problems; one is the other
parasitics you get, as ChrisQ mentioned, and the other is turn-on
transients.

I was having a problem with dV/dt causing ringing in an early gate
drive circuit:
http://webpages.charter.net/dawill/Images/Induction801.jpg
Inverter output, basically feeding an inductor (square voltage,
triangular current). This is above the LC resonant frequency, but
essentially identical to your situation.
Anyway, notice the drool on the falling edge. That doesn't belong
there. Let's take a closer look at it:
http://webpages.charter.net/dawill/Images/Induction802.jpg
Eww! dV/dt is coupling through the gate drive coupling transformer,
causing it to oscillate slightly. The period corresponds to the
propagation delay of the drive circuit, about 300ns.

So I straightaway just put a 0.1uF MKP on the output terminal. Yes,
awful short circuit current, but if it starts, it'll stay started and
keep running okay without problems. The energy is small (0.1uF
charged to full supply voltage is only 5mJ), so if transient voltages
don't explode it, it won't die thermally at least. No, not ideal, but
unfortunately I don't have a 0.1 ohm 10W resistor to put in series.
Anyway, this is the result,
http://webpages.charter.net/dawill/Images/Induction804.jpg
You can see a little chunk at turn-off, as current commutates from
transistor to capacitor. The voltage slope kind of wiggles by 10V,
resonating with Lstray (ESL of the snubber cap) and Cout (junction
capacitance), while the current waveform splats as it always does (eh,
it's an inductor, it picks up trash fairly well). At higher current,
of course, the slope steepens, and commutation time is reasonable.
It's a bit slow at this current, but well illustrates the effect.

Ultimately, I went without the snubber, because I changed the output
network from LLC to transformer coupled series resonant, which has far
better characteristics, and which is ZVS for most of its operating
range anyway (except at resonance, where power factor approaches 1).
I'm also building more noise-tolerant gate drives (or so I hope).

Speaking of which, here's a shot of the more recent output. You can
see the phase shift is exactly where it should be. Approaching
resonance (with more load applied!), phase gets completely in phase.
It even goes capacitive below resonance.
http://webpages.charter.net/dawill/Images/Induction1004.jpg

Tim
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