carrier synchronization for CPFSK demodulation
in [DSP]
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From: gobruins on 23 Mar 2010 12:43 >The phase error detector has to take into account the phase change >over a bit period. For h =3D 0.5, the phase changes 90 degrees over a >bit period. If you establish timing recovery first, then look at the >phase change from the start of a bit to the middle of a bit. It should >be +45 for positive frequency shift or -45 for negative frequency >shift. By adding or subtracting 45, you can get a phase error for your >PLL. > >John > I see, now it is clear to me, thank you so much. And one more question, is there a 'universal' lower bound of BER for FSK and MSK? When I develop my PSK demodulator, I have a mathematical equations to compute the theoretical BER curve like: http://en.wikipedia.org/wiki/File:PSK_BER_curves.svg, so I compared my measurements with this curve to understand the performance my demodulator. Could you please point me some articles about CPFSK and MSK BER derivative? Thanks again!
From: gobruins on 23 Mar 2010 12:57 >The phase error detector has to take into account the phase change >over a bit period. For h =3D 0.5, the phase changes 90 degrees over a >bit period. If you establish timing recovery first, then look at the >phase change from the start of a bit to the middle of a bit. It should >be +45 for positive frequency shift or -45 for negative frequency >shift. By adding or subtracting 45, you can get a phase error for your >PLL. > >John > I see, now it is clear to me, thank you so much. And one more question, is there a 'universal' lower bound of BER for FSK and MSK? When I develop my PSK demodulator, I have a mathematical equations to compute the theoretical BER curve like: http://en.wikipedia.org/wiki/File:PSK_BER_curves.svg, so I compared my measurements with this curve to understand the performance my demodulator. Could you please point me some articles about CPFSK and MSK BER derivative? Thanks again!
From: Tim Wescott on 23 Mar 2010 13:09 gobruins wrote: >> The phase error detector has to take into account the phase change >> over a bit period. For h =3D 0.5, the phase changes 90 degrees over a >> bit period. If you establish timing recovery first, then look at the >> phase change from the start of a bit to the middle of a bit. It should >> be +45 for positive frequency shift or -45 for negative frequency >> shift. By adding or subtracting 45, you can get a phase error for your >> PLL. >> >> John >> > > > I see, now it is clear to me, thank you so much. > > And one more question, is there a 'universal' lower bound of BER for FSK > and MSK? > > When I develop my PSK demodulator, I have a mathematical equations to > compute the theoretical BER curve like: > http://en.wikipedia.org/wiki/File:PSK_BER_curves.svg, so I compared my > measurements with this curve to understand the performance my demodulator. > > > Could you please point me some articles about CPFSK and MSK BER > derivative? Well, the most universal lower bound is 0.5 -- but I don't think that's what you meant. If you make some simplifying assumptions you can find an optimal detector, and it's BER vs. noise performance. I think this is what you meant. A good book on communications systems will get you those curves. For some modulation schemes and channels* the reality will closely reflect the theory; for other modulation schemes and channels** the math is simply intractable, and at best you can find bounds that you know you'll never approach. * E.g. MSK in a channel with Gaussian noise ** E.g. MSK in a channel with impulsive noise, or FM radio (with output SNR substituted for BER) in any noisy channel. -- Tim Wescott Control system and signal processing consulting www.wescottdesign.com
From: Jason on 25 Mar 2010 09:36
On Mar 23, 12:57 pm, "gobruins" <chunmei.kang(a)n_o_s_p_a_m.gmail.com> wrote: > >The phase error detector has to take into account the phase change > >over a bit period. For h =3D 0.5, the phase changes 90 degrees over a > >bit period. If you establish timing recovery first, then look at the > >phase change from the start of a bit to the middle of a bit. It should > >be +45 for positive frequency shift or -45 for negative frequency > >shift. By adding or subtracting 45, you can get a phase error for your > >PLL. > > >John > > I see, now it is clear to me, thank you so much. > > And one more question, is there a 'universal' lower bound of BER for FSK > and MSK? > > When I develop my PSK demodulator, I have a mathematical equations to > compute the theoretical BER curve like:http://en.wikipedia.org/wiki/File:PSK_BER_curves.svg, so I compared my > measurements with this curve to understand the performance my demodulator.. > > Could you please point me some articles about CPFSK and MSK BER > derivative? > > Thanks again! If you're looking for precise theoretical bit error rates for all variants of CPM, you'll probably find that they simply aren't available. The complexity of the decoding process doesn't lend itself well to an "equation" for bit error rate versus SNR. You'll be able to find theoretical lower bounds for bit error rate as a function of Eb/ No, but the tightness of the bound may vary depending upon the modulation index or number of bits per symbol. Jason |