interrupting for overflow and loop termination
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From: andrewspencers on 9 Sep 2005 15:03 Are there any CPU architectures which tie the overflow flag to an interrupt, so that programs don't have to put a flag test and conditional branch after each arithmetic operation in order to avoid modular arithmetic? And similarly, are there any architectures which tie the output of a logic function (hardwired or programmable) of the bits of a register or combination of registers to an interrupt, in order to provide interrupt-based loop termination and interrupt-based pattern matching?
From: Nick Maclaren on 9 Sep 2005 15:10 In article <1126290898.835776.58100(a)f14g2000cwb.googlegroups.com>, <andrewspencers(a)yahoo.com> wrote: >Are there any CPU architectures which tie the overflow flag to an >interrupt, so that programs don't have to put a flag test and >conditional branch after each arithmetic operation in order to avoid >modular arithmetic? Many, even today, after decades of the ghastly approach to eliminating overflow errors by eliminating overflow detection. But, switch it on, and you will find an awfully high proportion of compiled code, run-time systems and libraries fall over horribly. >And similarly, are there any architectures which tie the output of a >logic function (hardwired or programmable) of the bits of a register or >combination of registers to an interrupt, in order to provide >interrupt-based loop termination and interrupt-based pattern matching? Not that I know of. It is an old idea, but I don't know if it was ever implemented in hardware. God alone knows why not, because it is an obviously useful facility (e.g. for C assert) and needs next to no hardware to implement it. Regards, Nick Maclaren.
From: Jason Lee Eckhardt on 9 Sep 2005 15:33 In article <1126290898.835776.58100(a)f14g2000cwb.googlegroups.com>, <andrewspencers(a)yahoo.com> wrote: >Are there any CPU architectures which tie the overflow flag to an >interrupt, so that programs don't have to put a flag test and >conditional branch after each arithmetic operation in order to avoid >modular arithmetic? The Intel i860 went part of the way to that functionality. It had a "intovr" instruction (interrupt on overflow) which would trap if EPSR.OF was set. But the programmer still had to insert this instruction manually. This is somewhat simpler than a test-and-branch sequence, since it is only one instruction and the target is implicit.
From: glen herrmannsfeldt on 9 Sep 2005 16:32 andrewspencers(a)yahoo.com wrote: > Are there any CPU architectures which tie the overflow flag to an > interrupt, so that programs don't have to put a flag test and > conditional branch after each arithmetic operation in order to avoid > modular arithmetic? S/360 and successors have a program mask which activates or deactivates four program interrupts. Those four are fixed point overflow, decimal overflow, exponent underflow, and significance. There is no bit for exponent overflow, that is always enabled. (The interrupt routine can return without doing anything, though.) > And similarly, are there any architectures which tie the output of a > logic function (hardwired or programmable) of the bits of a register or > combination of registers to an interrupt, in order to provide > interrupt-based loop termination and interrupt-based pattern matching? This reminds me a little of the S/370 PER (program event recording) facility. You can request an interrupt for a register or set of registers being modified, storage within a range of addresses being modified or executed or the target of a branch instruction. See: http://publibfp.boulder.ibm.com/cgi-bin/bookmgr/BOOKS/dz9zr003/4.5 for the current version of PER.. It is mostly used by debuggers. -- glen
From: Terje Mathisen on 9 Sep 2005 16:46
Jason Lee Eckhardt wrote: > In article <1126290898.835776.58100(a)f14g2000cwb.googlegroups.com>, > <andrewspencers(a)yahoo.com> wrote: > >>Are there any CPU architectures which tie the overflow flag to an >>interrupt, so that programs don't have to put a flag test and >>conditional branch after each arithmetic operation in order to avoid >>modular arithmetic? > > > The Intel i860 went part of the way to that functionality. It > had a "intovr" instruction (interrupt on overflow) which would trap > if EPSR.OF was set. But the programmer still had to insert > this instruction manually. This is somewhat simpler than a > test-and-branch sequence, since it is only one instruction and the > target is implicit. This is exactly analogous to the x86 special one-byte opcode, INTerrupt_on_Overflow (INTO) which also has to be compiled in, and which will generate an interrupt, if the Overflow flag was set by the last arithmetic/logic operation. Terje -- - <Terje.Mathisen(a)hda.hydro.com> "almost all programming can be viewed as an exercise in caching" |