mm: iommu: An API to unify IOMMU, CPU and device memory management
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From: stepanm on 20 Jul 2010 18:10 Russell- If a driver wants to allow a device to access memory (and cache coherency is off/not present for device addesses), the driver needs to remap that memory as non-cacheable. Suppose there exists a chunk of physically-contiguous memory (say, memory reserved for device use) that happened to be already mapped into the kernel as normal memory (cacheable, etc). One way to remap this memory is to use ioremap (and then never touch the original virtual mapping, which would now have conflicting attributes). I feel as if there should be a better way to remap memory for device access, either by altering the attributes on the original mapping, or removing the original mapping and creating a new one with attributes set to non-cacheable. Is there a better way to do this than calling ioremap() on that memory? Please advise. Thanks Steve Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum. > On Mon, Jul 19, 2010 at 10:55:15AM -0700, Michael Bohan wrote: >> >> On 7/16/2010 12:58 AM, Russell King - ARM Linux wrote: >> >>> As the patch has been out for RFC since early April on the >>> linux-arm-kernel >>> mailing list (Subject: [RFC] Prohibit ioremap() on kernel managed RAM), >>> and no comments have come back from Qualcomm folk. >> >> Would it be unreasonable to allow a map request to succeed if the >> requested attributes matched that of the preexisting mapping? > > What would be the point of creating such a mapping? > -- > To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" > in > the body of a message to majordomo(a)vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
From: stepanm on 21 Jul 2010 14:10
> ************************************************************************* >> > This is difficult to achieve without remapping kernel memory using L2 >> > page tables, so we can unmap pages on 4K page granularity. That's >> > going to increase TLB overhead and result in lower system performance >> > as there'll be a greater number of MMU misses. > ************************************************************************* Given how the buffers in question can be on the orders of tens of MB (and I don't think they will ever be less than 1MB), would we be able to get the desired effect by unmapping and then remapping on a 1MB granularity (ie, L1 sections)? It seems to me like this should be sufficient, and would not require using L2 mappings. Thoughts? Thanks Steve Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ |