Prev: mtd: Increase NAND_MAX_OOBSIZE from 128 to 256
Next: PPC64 2.6.34-rc6 warning - Is this expected ?
From: Artem Bityutskiy on 5 May 2010 07:20
On Mon, 2010-05-03 at 17:46 -0700, Kevin Cernekee wrote:
> Some of the newer MLC devices have a 6-byte ID sequence in which
> several field definitions differ from older chips in a manner that is
> not backward compatible. For instance:
>
> Samsung K9GAG08U0M (5-byte sequence): ec d5 14 b6 74
> 4th byte, bits 1:0 encode the page size: 0=1KiB, 1=2KiB, 2=4KiB, 3=8KiB
> 4th byte, bits 5:4 encode the block size: 0=64KiB, 1=128KiB, ...
> 4th byte, bit 6 encodes the OOB size: 0=8B/512B, 1=16B/512B
>
> Samsung K9GAG08U0D (6-byte sequence): ec d5 94 29 34 41
> 4th byte, bits 1:0 encode the page size: 0=2KiB, 1=4KiB, 3=8KiB, 4=rsvd
> 4th byte, bits 7;5:4 encode the block size: 0=128KiB, 1=256KiB, ...
> 4th byte, bits 6;3:2 encode the OOB size: 1=128B/page, 2=218B/page
>
> This patch uses the new 6-byte scheme if the ID code wraps around
> exactly at byte 6, and falls back to the old scheme otherwise.
>
> Signed-off-by: Kevin Cernekee <cernekee(a)gmail.com>

Pushed to l2-mtd-2.6 / master

--
Best Regards,
Artem Bityutskiy (Артём Битюцкий)

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo(a)vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
 | 
Pages: 1
Prev: mtd: Increase NAND_MAX_OOBSIZE from 128 to 256
Next: PPC64 2.6.34-rc6 warning - Is this expected ?