From: pawel on
Hi,
I have developed a driver for PCI Video Capture device. Now, I have
ported this hardware to PCI-Express,
by adding a PCI-Express to PCI bridge chipset on the board. I have PCI
Express Video Capture Device.
I have implemented the driver for Linux. It works.


To program device's FPGA Chipset, I need to access GPIO registers from
PCI-Express bridge configuration space.

For Windows: I have developed Upper Filter for pci.sys. I can access
FPGA registers using IRP_MN_READ_CONFIG and IRP_MN_WRITE_CONFIG.
I can program FPGA, but it takes about 20 minutes to complete the
programming.
I have found the solution here.


To speed it up (for Linux it takes about 4 seconds)
I need to access PCI config space directly. How to map BAR0
(configuration space) into my system from driver upper filter? How to
get from PDO to MmMapIoSpace.

With first version (PCI Video Capture Device) I get already mapped IO
from PCI_CONFIGURATION structure.

-Pawel
From: eagersh on
On Mar 23, 8:08 am, pawel <pawel...(a)gmail.com> wrote:
> Hi,
> I have developed a driver for PCI Video Capture device.  Now, I have
> ported this hardware to PCI-Express,
> by adding a PCI-Express to PCI bridge chipset on the board. I have PCI
> Express Video Capture Device.
> I have implemented the driver for Linux. It works.
>
> To program device's FPGA Chipset, I need to access GPIO registers from
> PCI-Express bridge configuration space.
>
> For Windows: I have developed Upper Filter for pci.sys. I can access
> FPGA registers using IRP_MN_READ_CONFIG and IRP_MN_WRITE_CONFIG.
> I can program FPGA, but it takes about 20 minutes to complete the
> programming.
> I have found the solution here.
>
> To speed it up (for Linux it takes about 4 seconds)
> I need to access PCI config space directly. How to map BAR0
> (configuration space) into my system from driver upper filter? How to
> get from PDO to MmMapIoSpace.
>
> With first version (PCI Video Capture Device) I get already mapped IO
> from PCI_CONFIGURATION structure.
>
> -Pawel

You could trace StartDevice Irp in your filter driver. Such Irp
contains PCI resources including mapped BAR's. But I don't think it is
legitimate way in Windows.
You should better to concentrate on understanding why you got such big
difference in time of programming.

Igor Sharovar
From: alberto on

Can't you just read the appropriate BAR register and map the physical
memory as you require ? Or, maybe easier, catch the Start IRP, fish
out the BAR addesses from the resources list, and map the space.

On Mar 23, 10:08 am, pawel <pawel...(a)gmail.com> wrote:
> Hi,
> I have developed a driver for PCI Video Capture device.  Now, I have
> ported this hardware to PCI-Express,
> by adding a PCI-Express to PCI bridge chipset on the board. I have PCI
> Express Video Capture Device.
> I have implemented the driver for Linux. It works.
>
> To program device's FPGA Chipset, I need to access GPIO registers from
> PCI-Express bridge configuration space.
>
> For Windows: I have developed Upper Filter for pci.sys. I can access
> FPGA registers using IRP_MN_READ_CONFIG and IRP_MN_WRITE_CONFIG.
> I can program FPGA, but it takes about 20 minutes to complete the
> programming.
> I have found the solution here.
>
> To speed it up (for Linux it takes about 4 seconds)
> I need to access PCI config space directly. How to map BAR0
> (configuration space) into my system from driver upper filter? How to
> get from PDO to MmMapIoSpace.
//>
> With first version (PCI Video Capture Device) I get already mapped IO
> from PCI_CONFIGURATION structure.
>
> -Pawel

From: Pavel A. on
Instead of IRP_MN_READ_CONFIG and IRP_MN_WRITE_CONF,
consider IRP_MN_QUERY_INTERFACE to get BUS_INTERFACE_STANDARD
of the pci bus driver, and then call SetBusData and GetBusData.
Should be much faster.

-- pa

"pawel" <pawelfic(a)gmail.com> wrote in message
news:5d488764-60fd-44e4-8ba5-f0b3987bf1bc(a)t20g2000yqe.googlegroups.com...
> Hi,
> I have developed a driver for PCI Video Capture device. Now, I have
> ported this hardware to PCI-Express,
> by adding a PCI-Express to PCI bridge chipset on the board. I have PCI
> Express Video Capture Device.
> I have implemented the driver for Linux. It works.
>
>
> To program device's FPGA Chipset, I need to access GPIO registers from
> PCI-Express bridge configuration space.
>
> For Windows: I have developed Upper Filter for pci.sys. I can access
> FPGA registers using IRP_MN_READ_CONFIG and IRP_MN_WRITE_CONFIG.
> I can program FPGA, but it takes about 20 minutes to complete the
> programming.
> I have found the solution here.
>
>
> To speed it up (for Linux it takes about 4 seconds)
> I need to access PCI config space directly. How to map BAR0
> (configuration space) into my system from driver upper filter? How to
> get from PDO to MmMapIoSpace.
>
> With first version (PCI Video Capture Device) I get already mapped IO
> from PCI_CONFIGURATION structure.
>
> -Pawel

From: pawel on
Thanks for reply. I will try to solve the problem now, I will report
on the result.
Here are my comments:

@eagersh
> You could trace StartDevice Irp in your filter driver. Such Irp
> contains PCI resources including mapped BAR's.

-I think this is the way is supposed to be handled, but I had problems
tracking down appropriate structure and fields.
IRP_MN_START_DEVICE handler provides me with (PDEVICE_OBJECT
DeviceObject, PIRP Irp).
And then I am not sure what to do with them. For windows I have only
developed a video capture minidriver.
Things were easy :-). Now it is probably also "very easy".


@alberto
>Can't you just read the appropriate BAR register and map the physical
>memory as you require ?
I could do that. I haven't thought about it, I was trying to get the
system
to do it for me.

>fish out the BAR addesses
I would love that. It is what eagersh mentioned.


@Pavel A.
> consider IRP_MN_QUERY_INTERFACE to get BUS_INTERFACE_STANDARD
-I will take a look at it, sounds interesting.