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From: Andi Kleen on 27 Mar 2010 17:40 Peter Zijlstra <peterz(a)infradead.org> writes: > Subject: perf, x86: Add Nehelem PMU programming errata workaround > From: Peter Zijlstra <a.p.zijlstra(a)chello.nl> > Date: Fri Mar 26 13:59:41 CET 2010 > > Implement the workaround for Intel Errata AAK100 and AAP53. > > Also, remove the Core-i7 name for Nehalem events since there are also > Westmere based i7 chips. Did you actually see this happen? It looks like this will make the context switch into a perf enabled process _MUCH_ more expensive, MSR writes are very slow. -Andi -- ak(a)linux.intel.com -- Speaking for myself only. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
From: Stephane Eranian on 28 Mar 2010 18:00
On Sat, Mar 27, 2010 at 10:27 PM, Andi Kleen <andi(a)firstfloor.org> wrote: > Peter Zijlstra <peterz(a)infradead.org> writes: > >> Subject: perf, x86: Add Nehelem PMU programming errata workaround >> From: Peter Zijlstra <a.p.zijlstra(a)chello.nl> >> Date: Fri Mar 26 13:59:41 CET 2010 >> >> Implement the workaround for Intel Errata AAK100 and AAP53. >> >> Also, remove the Core-i7 name for Nehalem events since there are also >> Westmere based i7 chips. > > Did you actually see this happen? > This is the same as AAJ91. At the time, I created a test program and it was moderately easy to reproduce. > It looks like this will make the context switch into a perf > enabled process _MUCH_ more expensive, MSR writes are very slow. > Yes, but there is no alternative, I suspect. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ |