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From: khan Sim on 4 Jun 2010 01:15
hi,
Kindly try to read the whole problem, i apologize for typing much. :)
i am facing a problem , i am trying for the last 2 weeks but the problem is still there. urgent help is required.Kindly understand the problem and reply . the problem is given below.

Input 'A' can have any value. For simplicity i have given signal as A=[1,2,3,4].

1. A signal 'A=[1,2,3,4]' is coming into a simulink model . The signal is sample based with sample time of 1/4. it means the 4 samples of 'A' comes in 1 second. i have made an HDL compatible simulink block which finds the max of signal 'A' i.e Amax =max(A). The max is calculated as the last input of signal 'A' enters into the block (here the last input is '4') .

2. it means the first max is caculated and given as output at time t= 3*1/4 the second max is caluclated at time t=1+(3*1/4 ) The third max is calculated at t=2+(3*1/4) and so on.

3. In the next step the max is divided by 2, that is Amax2= Amax/2. Amax2 is a scalar number.

4. Now Amax2 is compared with EACH sample of 'A'.
if Amax2>A
ouput=Amax2
else
output=A

5. It may be noted that Amax2 is generated at t=n+(3*1/4) where n=0,1,2,3,4.....

(AFTER THIS YOUR GUIDANCE IS REQUIRED, KINDLY RECTIFY ME IF I AM WRONG )

6. i have used Delays to shift the signal 'A' with delays 0,1,2,3 in parallel, that is 4 wires are connected to A and wire0 is delayed with 0, wire1 with 1, wire2 with 2 and wire3 with delay of 3.
now the signals of wire0,wire1,wire2,wire3 are compared separately with 'Amax2' and the output is given. in this way i have compared every sample of A with 'Amax2'.

7. Now i have four outputs as a result of wire0, wire1, wire2, wire3. the outputs are output0, output1, output2, output3. EXCEPT THE the sample at t=n+(3*1/4), rest every sample is equal to the corresponding original samples of 'A'.

The problem is

8. How can i extract the samples at t=n+(3*1/4) from the output1, output2, output3 and output4???

"it may be noted that i am making this model for HDL code genration."

kind regards
Khan
From: khan Sim on 4 Jun 2010 03:27
"khan Sim" <akhun85(a)yahoo.com> wrote in message <hua24r$auo$1(a)fred.mathworks.com>...
> hi,
> Kindly try to read the whole problem, i apologize for typing much. :)
> i am facing a problem , i am trying for the last 2 weeks but the problem is still there. urgent help is required.Kindly understand the problem and reply . the problem is given below.
>
> Input 'A' can have any value. For simplicity i have given signal as A=[1,2,3,4].
>
> 1. A signal 'A=[1,2,3,4]' is coming into a simulink model . The signal is sample based with sample time of 1/4. it means the 4 samples of 'A' comes in 1 second. i have made an HDL compatible simulink block which finds the max of signal 'A' i.e Amax =max(A). The max is calculated as the last input of signal 'A' enters into the block (here the last input is '4') .
>
> 2. it means the first max is caculated and given as output at time t= 3*1/4 the second max is caluclated at time t=1+(3*1/4 ) The third max is calculated at t=2+(3*1/4) and so on.
>
> 3. In the next step the max is divided by 2, that is Amax2= Amax/2. Amax2 is a scalar number.
>
> 4. Now Amax2 is compared with EACH sample of 'A'.
> if Amax2>A
> ouput=Amax2
> else
> output=A
>
> 5. It may be noted that Amax2 is generated at t=n+(3*1/4) where n=0,1,2,3,4.....
>
> (AFTER THIS YOUR GUIDANCE IS REQUIRED, KINDLY RECTIFY ME IF I AM WRONG )
>
> 6. i have used Delays to shift the signal 'A' with delays 0,1,2,3 in parallel, that is 4 wires are connected to A and wire0 is delayed with 0, wire1 with 1, wire2 with 2 and wire3 with delay of 3.
> now the signals of wire0,wire1,wire2,wire3 are compared separately with 'Amax2' and the output is given. in this way i have compared every sample of A with 'Amax2'.
>
> 7. Now i have four outputs as a result of wire0, wire1, wire2, wire3. the outputs are output0, output1, output2, output3. EXCEPT THE the sample at t=n+(3*1/4), rest every sample is equal to the corresponding original samples of 'A'.
>
> The problem is
>
> 8. How can i extract the samples at t=n+(3*1/4) from the output1, output2, output3 and output4???
>
> "it may be noted that i am making this model for HDL code genration."
>
> kind regards
> Khan
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