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From: tip-bot for Cyrill Gorcunov on 15 May 2010 04:50
Commit-ID: 1ff3d7d79204612ebe2e611d2592f8898908ca00
Gitweb: http://git.kernel.org/tip/1ff3d7d79204612ebe2e611d2592f8898908ca00
Author: Cyrill Gorcunov <gorcunov(a)gmail.com>
AuthorDate: Fri, 14 May 2010 23:08:15 +0400
Committer: Ingo Molnar <mingo(a)elte.hu>
CommitDate: Sat, 15 May 2010 08:38:55 +0200

x86, perf: P4 PMU - fix counters management logic

Jaswinder reported this #GP:

|
| Message from syslogd(a)ht at May 14 09:39:32 ...
| kernel:[ 314.908612] EIP: [<c100ccca>]
| x86_perf_event_set_period+0x19d/0x1b2 SS:ESP 0068:edac3d70
|

Ming has narrowed it down to a comparision issue
between arguments with different sizes and
signs. As result event index reached a wrong
value which in turn led to a GP fault.

At the same time it was found that p4_next_cntr
has broken logic and should return the counter
index only if it was not yet borrowed for
another event.

Reported-by: Jaswinder Singh Rajput <jaswinderlinux(a)gmail.com>
Reported-by: Lin Ming <ming.m.lin(a)intel.com>
Bisected-by: Lin Ming <ming.m.lin(a)intel.com>
Tested-by: Jaswinder Singh Rajput <jaswinderlinux(a)gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov(a)openvz.org>
CC: Peter Zijlstra <a.p.zijlstra(a)chello.nl>
CC: Frederic Weisbecker <fweisbec(a)gmail.com>
LKML-Reference: <20100514190815.GG13509(a)lenovo>
Signed-off-by: Ingo Molnar <mingo(a)elte.hu>
---
arch/x86/kernel/cpu/perf_event_p4.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index cb875b1..424fc8d 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -18,7 +18,7 @@
struct p4_event_bind {
unsigned int opcode; /* Event code and ESCR selector */
unsigned int escr_msr[2]; /* ESCR MSR for this event */
- unsigned char cntr[2][P4_CNTR_LIMIT]; /* counter index (offset), -1 on abscence */
+ char cntr[2][P4_CNTR_LIMIT]; /* counter index (offset), -1 on abscence */
};

struct p4_cache_event_bind {
@@ -747,11 +747,11 @@ static int p4_get_escr_idx(unsigned int addr)
static int p4_next_cntr(int thread, unsigned long *used_mask,
struct p4_event_bind *bind)
{
- int i = 0, j;
+ int i, j;

for (i = 0; i < P4_CNTR_LIMIT; i++) {
- j = bind->cntr[thread][i++];
- if (j == -1 || !test_bit(j, used_mask))
+ j = bind->cntr[thread][i];
+ if (j != -1 && !test_bit(j, used_mask))
return j;
}

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