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From: Leigh Johnston on 7 Jan 2010 18:57

I am confused, the Wikipedia article
http://en.wikipedia.org/wiki/Double-checked_locking claims that VC++
volatile keyword includes a memory barrier however if I compile the
following program:

volatile int n1;
volatile int n2;

int main()
{
++n1;
++n2;
}

I get the following output:

_main PROC ; COMDAT

; 19 : ++n1;

00000 b8 01 00 00 00 mov eax, 1
00005 01 05 00 00 00
00 add DWORD PTR ?n1@@3HC, eax ; n1

; 20 : ++n2;

0000b 01 05 00 00 00
00 add DWORD PTR ?n2@@3HC, eax ; n2

; 21 : }

00011 33 c0 xor eax, eax
00013 c3 ret 0
_main ENDP

I cannot see any memory barrier instructions here unless I am being stupid
so my question is does VC++ volatile keyword provide a memory barrier or
not? I am using VS2008.

/Leigh

From: Igor Tandetnik on 7 Jan 2010 20:03
Leigh Johnston <leigh(a)i42.co.uk> wrote:
> I am confused, the Wikipedia article
> http://en.wikipedia.org/wiki/Double-checked_locking claims that VC++
> volatile keyword includes a memory barrier however if I compile the
> following program:
>
> I get the following output:
>
> 00000 b8 01 00 00 00 mov eax, 1
> 00005 01 05 00 00 00
> 00 add DWORD PTR ?n1@@3HC, eax ; n1
>
> I cannot see any memory barrier instructions

x86 CPUs don't have memory barrier instructions and, architecturally, don't need them. You'd need to compile for IA64 to see them in action.
--
With best wishes,
Igor Tandetnik

With sufficient thrust, pigs fly just fine. However, this is not necessarily a good idea. It is hard to be sure where they are going to land, and it could be dangerous sitting under them as they fly overhead. -- RFC 1925

From: Leigh Johnston on 8 Jan 2010 07:49


"Igor Tandetnik" <itandetnik(a)mvps.org> wrote in message
news:e97jv5$jKHA.1648(a)TK2MSFTNGP05.phx.gbl...
> Leigh Johnston <leigh(a)i42.co.uk> wrote:
>> I am confused, the Wikipedia article
>> http://en.wikipedia.org/wiki/Double-checked_locking claims that VC++
>> volatile keyword includes a memory barrier however if I compile the
>> following program:
>>
>> I get the following output:
>>
>> 00000 b8 01 00 00 00 mov eax, 1
>> 00005 01 05 00 00 00
>> 00 add DWORD PTR ?n1@@3HC, eax ; n1
>>
>> I cannot see any memory barrier instructions
>
> x86 CPUs don't have memory barrier instructions and, architecturally,
> don't need them. You'd need to compile for IA64 to see them in action.

not true, LFENCE, SFENCE, MFENCE and LOCK all exist for x86 and are useful
in multi-threaded programs.

/Leigh

From: Leigh Johnston on 8 Jan 2010 08:06
Targeting x64 makes no difference, still no memory barrier instructions
output.

From: Igor Tandetnik on 8 Jan 2010 08:35
Leigh Johnston wrote:
> "Igor Tandetnik" <itandetnik(a)mvps.org> wrote in message
> news:e97jv5$jKHA.1648(a)TK2MSFTNGP05.phx.gbl...
>> Leigh Johnston <leigh(a)i42.co.uk> wrote:
>>> I am confused, the Wikipedia article
>>> http://en.wikipedia.org/wiki/Double-checked_locking claims that VC++
>>> volatile keyword includes a memory barrier however if I compile the
>>> following program:
>>>
>>> I get the following output:
>>>
>>> 00000 b8 01 00 00 00 mov eax, 1
>>> 00005 01 05 00 00 00
>>> 00 add DWORD PTR ?n1@@3HC, eax ; n1
>>>
>>> I cannot see any memory barrier instructions
>>
>> x86 CPUs don't have memory barrier instructions and, architecturally,
>> don't need them. You'd need to compile for IA64 to see them in action.
>
> not true, LFENCE, SFENCE, MFENCE and LOCK all exist for x86 and are useful
> in multi-threaded programs.

http://www.linuxjournal.com/article/8211

x86 CPU provides process consistency, where writes by one CPU are observed in order by all other CPUs. For this reason, it doesn't need explicit memory barrier instructions.

LFENCE, SFENCE and MFENCE are SSE instructions, apparently needed because certain other SSE instructions are asynchronous. I must admit I'm not very familiar with SSE, but your example doesn't issue SSE instructions anyway, so this is moot.

LOCK is not an instruction by itself, but a prefix to other instructions that renders them atomic (e.g. instructions like ADD which need to read, modify and write a memory location). Note that "volatile" doesn't promise or guarantee atomicity: ++n1 is still not atomic even though n1 is declared volatile.
--
With best wishes,
Igor Tandetnik

With sufficient thrust, pigs fly just fine. However, this is not necessarily a good idea. It is hard to be sure where they are going to land, and it could be dangerous sitting under them as they fly overhead. -- RFC 1925
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