6502 illegal opcodes questions
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From: John Selck on 25 Apr 2006 06:42 Don Bruder wrote: > In article <j7Wdne2Ir5coidDZnZ2dnUVZ_vydnZ2d(a)comcast.com>, > "Michael J. Mahon" <mjmahon(a)aol.com> wrote: > >> Since there were several versions of the 6502, isn't it likely that >> some had *differing* illegal ops and results? > > Not just likely - Absolutely certain. > > I've long since forgotten the source, but there used to be a listing of > how the various "illegal" opcodes differed from chip version to chip > version, and only a very tiny handful of them that worked on one version > would work (or even do ANYTHING) on another version. If we're talking of normal 6502's, then there are almost no differences on the illegal opcodes. There are ofcourse extended versions of the 6502 like the 65CE02 or the 65C02, but these don't count since also the documented opcodes have changed... If we're talking about the illegals and differences, the only thing which usually is different is the stability of some illegals, but if you know about these it is safe to use the stable ones or cancel out the unstability (by ANDing with 0's for example).
From: MagerValp on 25 Apr 2006 08:16 >>>>> "hm" == heuser marcus <heuser.marcus(a)freenet.de> writes: hm> On the other hand I haven't seen an application where they were hm> indispensable. There are several C64 demo effects that could not have been done without illegal opcodes. One good example is 6 sprites on top of an FLI picture, done by Ninja in Darwin 80%: http://noname.c64.org/csdb/release/?id=12732 It's not just one or two illegals here and there either: 9097 8D 11 D0 STA $D011 909a 4F 18 D0 SRE $D018 909d 8D 11 D0 STA $D011 90a0 4F 02 DD SRE $DD02 90a3 8C 11 D0 STY $D011 90a6 0E 18 D0 ASL $D018 90a9 8F 11 D0 SAX $D011 90ac 8C 02 DD STY $DD02 90af 8D 11 D0 STA $D011 90b2 4F 18 D0 SRE $D018 90b5 8D 11 D0 STA $D011 90b8 6F 02 DD RRA $DD02 90bb 8D 11 D0 STA $D011 90be 0F 18 D0 SLO $D018 90c1 8E 11 D0 STX $D011 90c4 8E 02 DD STX $DD02 90c7 8D 11 D0 STA $D011 90ca 4F 18 D0 SRE $D018 90cd 8D 11 D0 STA $D011 90d0 4F 02 DD SRE $DD02 They were also used in a lot of games - instructions like LAX, SAX are easy to use and can save a couple of cycles in a critical place. -- ___ . . . . . + . . o _|___|_ + . + . + . Per Olofsson, arkadspelare o-o . . . o + MagerValp(a)cling.gu.se - + + . http://www.cling.gu.se/~cl3polof/
From: Scott Hemphill on 25 Apr 2006 14:41 Linards Ticmanis <ticmanis(a)gmx.de> writes: > Thanks for all your helpful replies, which are going to find their way > into an AppleWin improvement soon, if all goes well. > > I'm still not quite happy with some ugly details that I haven't seen > documented too well: > > 1.) Operation of ARR ($6B) when the decimal flag is SET. > > 2.) Exact operation of decimal mode ADC and SBC in both the 6502 and > the 65C02. I have C code which emulates ADC and SBC for the 65C02 for all values of the argments and flags. > > I'll take a look at the VICE code first. Do you know of any other GOOD > code for this? > > Best wishes, > -- > Linards Ticmanis -- Scott Hemphill hemphill(a)alumni.caltech.edu "This isn't flying. This is falling, with style." -- Buzz Lightyear
From: Linards Ticmanis on 25 Apr 2006 17:00 Scott Hemphill wrote: >> I'm still not quite happy with some ugly details that I haven't seen >> documented too well: >> >> 1.) Operation of ARR ($6B) when the decimal flag is SET. >> >> 2.) Exact operation of decimal mode ADC and SBC in both the 6502 and >> the 65C02. > > I have C code which emulates ADC and SBC for the 65C02 for all values of > the argments and flags. Thanks Scott! I've copied the algorithm from VICE for now, but that is of course NMOS 6502 only, since Commodore never switched to the 65C02 chips for their own computers. Thus I am very interested in your code for better coverage of 65C02. Would you mind posting it here or mailing it to me? My From address is valid. All the Best, -- Linards Ticmanis
From: Scott Hemphill on 25 Apr 2006 22:39
Linards Ticmanis <ticmanis(a)gmx.de> writes: > Scott Hemphill wrote: > >> I'm still not quite happy with some ugly details that I haven't seen > >> documented too well: > >> > >> 1.) Operation of ARR ($6B) when the decimal flag is SET. > >> > >> 2.) Exact operation of decimal mode ADC and SBC in both the 6502 and > >> the 65C02. > > I have C code which emulates ADC and SBC for the 65C02 for all > > values of > > the argments and flags. > > Thanks Scott! I've copied the algorithm from VICE for now, but that is > of course NMOS 6502 only, since Commodore never switched to the 65C02 > chips for their own computers. Thus I am very interested in your code > for better coverage of 65C02. Would you mind posting it here or > mailing it to me? My From address is valid. OK, here it is. A is the accumulator, b is the argument (an unsigned 8-bit quantity). V, D, and C are booleans which represent the state of the corresponding flags. NZ is a byte which holds the state of the N and Z flags. The N flag is set if (NZ & 0x80) is true, and the Z flag is set if (NZ == 0) is true. w is a 16-bit unsigned scratch location. These instructions were tested by running a PRODOS program which combined each of the 256 possible accumulator values with the 256 argument values. The 64K combinations were output as a 128K file containing a one-byte result and one byte of flags. The program was edited to produce 8 different versions: (initial C set/clear)x(initial D set/clear)x(ADC/SBC). The program versions were run on a Laser 128/EX and on an emulator, and the results compared. (All of this was done about 20 years ago.) #define ADC() \ do { \ if ((A^b) & 0x80) V = 0; else V = 1; \ if (D) { \ w = (A & 0xf) + (b & 0xf) + C; \ if (w >= 10) w = 0x10 | ((w+6)&0xf); \ w += (A & 0xf0) + (b & 0xf0); \ if (w >= 160) { \ C = 1; \ if (V && w >= 0x180) V = 0; \ w += 0x60; \ } else { \ C = 0; \ if (V && w < 0x80) V = 0; \ } \ } else { \ w = A + b + C; \ if (w >= 0x100) { \ C = 1; \ if (V && w >= 0x180) V = 0; \ } else { \ C = 0; \ if (V && w < 0x80) V = 0; \ } \ } \ A = (byte)w; \ NZ = A; \ } while (0) #define SBC() \ do { \ if ((A^b) & 0x80) V = 1; else V = 0; \ if (D) { \ int tmp; \ tmp = 0xf + (A & 0xf) - (b & 0xf) + C; \ if (tmp < 0x10) { \ w = 0; \ tmp -= 6; \ } else { \ w = 0x10; \ tmp -= 0x10; \ } \ w += 0xf0 + (A & 0xf0) - (b & 0xf0); \ if (w < 0x100) { \ C = 0; \ if (V && w < 0x80) V = 0; \ w -= 0x60; \ } else { \ C = 1; \ if (V && w >= 0x180) V = 0; \ } \ w += tmp; \ } else { \ w = 0xff + A - b + C; \ if (w < 0x100) { \ C = 0; \ if (V && w < 0x80) V = 0; \ } else { \ C = 1; \ if (V && w >= 0x180) V = 0; \ } \ } \ A = (byte)w; \ NZ = A; \ } while (0) -- Scott Hemphill hemphill(a)alumni.caltech.edu "This isn't flying. This is falling, with style." -- Buzz Lightyear |