From: Eeyore on


MooseFET wrote:

> "TT_Man" <Some...(a)ntlworld.com> wrote:
> > ">>>> >> I think he said it was all written in asssembler <yuk>.
> >
> > >> > On an 8051, asm is really the way to go. The OP was making comments
> > >> > about DPTR so I suspected asm but vagueness of his descriptions
> > >> > sounded like a C programmer who doesn't really know what is going on
> > >> > under the hood. Many C compilers overlay variables on the 8051 if he
> > >> > is doing interrupts in C code he may be running a routine in the
> > >> > interrupt code that overlays one of his variables.
> >
> > >> >> Graham
> >
> > >> Not a prayer in hell 100% assembler. :)
> >
> > > Are you using interrupts?
> >
> > Everything is interrupt driven. Processor spends 99% in sleep mode.Int
> > routines set flags and the background processes flags, then goes back to
> > sleep. Dual 3 of 5 uarts are processed with 125uS RTC.
>
> I think you need to look very carefully at the interrupt code to make
> sure that it doesn't forget to save part of the context. This sounds
> like it is either timing related or an uninitialized flag.

Hmmm that's not how to code 8051 inrterrupts.

Graham


From: Eeyore on


MooseFET wrote:

> On Sep 6, 5:30 am, Rich Grise <r...(a)example.net> wrote:
> > On Fri, 05 Sep 2008 17:53:59 +0100, TT_Man wrote:
> > > ">>
> > >>> >> I think he said it was all written in asssembler <yuk>.
> >
> > >>> > On an 8051, asm is really the way to go. The OP was making comments
> > >>> > about DPTR so I suspected asm but vagueness of his descriptions
> > >>> > sounded like a C programmer who doesn't really know what is going on
> > >>> > under the hood. Many C compilers overlay variables on the 8051 if he
> > >>> > is doing interrupts in C code he may be running a routine in the
> > >>> > interrupt code that overlays one of his variables.
> >
> > >>> Not a prayer in hell 100% assembler. :)
> >
> > >> Are you using interrupts?
> > > Everything is interrupt driven. Processor spends 99% in sleep mode.Int
> > > routines set flags and the background processes flags, then goes back to
> > > sleep. Dual 3 of 5 uarts are processed with 125uS RTC.
> >
> > This raises a BIG red flag for me - how long does the uP take to come out
> > of sleep mode? How's the interrupt latency? Did it used to block other
> > interrupts, or could they be stepping on each other?
>
> 8051s have a built in interrupt lock out and priority system. I doubt
> that he is getting into multiple levels of interrupts.

LOL !

All too easy by half and don't forget you have only 4 register banks to play
with, meaning only only 3 simultaneous interrupts. of various priorities.

Graham

From: Eeyore on


MooseFET wrote:

> Eeyore wrote:
> > MooseFET wrote:
> > > Eeyore wrote:
> > > > MooseFET wrote:
> >
> > > > > Is it written in ASM or C?
> >
> > > > I think he said it was all written in asssembler <yuk>.
> >
> > > On an 8051, asm is really the way to go. The OP was making comments
> > > about DPTR so I suspected asm but vagueness of his descriptions
> > > sounded like a C programmer who doesn't really know what is going on
> > > under the hood. Many C compilers overlay variables on the 8051 if he
> > > is doing interrupts in C code he may be running a routine in the
> > > interrupt code that overlays one of his variables.
> >
> > I still use PL/M 51. So easy to use. You can treat it as highish level language and
> > set a register directly in the next line.
> >
> > I can't even begin to imagine coding some of the fairly complex (for microcontrollers)
> > stuff that we did with 8051s in asm. The mind boggles. Never mind code maintenance.
>
> I do it all the time. It takes less time to write the code than to
> design it. Any competent engineer can maintain it.

I'll send you some code shall I ?

ASM is for twits, the clueless, poor and morons mainly AFAICS.

I don't mind checking the asm output of PL/M to see how it's done it though. Never been
unsatisfied.

Graham


From: TT_Man on
>>>> Not a prayer in hell 100% assembler. :)
>>>
>>> Are you using interrupts?
>> Everything is interrupt driven. Processor spends 99% in sleep mode.Int
>> routines set flags and the background processes flags, then goes back to
>> sleep. Dual 3 of 5 uarts are processed with 125uS RTC.
>
> This raises a BIG red flag for me - how long does the uP take to come out
> of sleep mode? How's the interrupt latency? Did it used to block other
> interrupts, or could they be stepping on each other?
>
> But I've never trusted "sleep mode" - probably because it takes me about
> 3 hours after getting up, before I'm fully awake. ;-)
>
> Do you have a little "morning eye-opener" circuit? ;-D
>
> Good Luck!
> Rich
>
Latency is 1 instruction cycle.


From: TT_Man on

>
> LOL !
>
> All too easy by half and don't forget you have only 4 register banks to
> play
> with, meaning only only 3 simultaneous interrupts. of various priorities.
>
> Graham
>
Not true, with careful innovative Int. structures