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From: Mawa_fugo on 16 Apr 2010 15:16
Hi all,
Is there anyway to modify bit file just to change I/O slew rate &
drive strength without re-run ISE processes ?

TIA & TGIF
From: Gabor on 16 Apr 2010 16:32
On Apr 16, 3:16 pm, Mawa_fugo <cco...(a)netscape.net> wrote:
> Hi all,
> Is there anyway to modify bit file just to change I/O slew rate &
> drive strength without re-run ISE processes ?
>
> TIA & TGIF

The easiest way is to use the FPGA editor to modify the
settings (find your IOB in the "components" list and
then use "editblock"). Then save the file and just
re-run bitgen.

Regards,
Gabor
From: rickman on 17 Apr 2010 10:52
On Apr 16, 4:32 pm, Gabor <ga...(a)alacron.com> wrote:
> On Apr 16, 3:16 pm, Mawa_fugo <cco...(a)netscape.net> wrote:
>
> > Hi all,
> > Is there anyway to modify bit file just to change I/O slew rate &
> > drive strength without re-run ISE processes ?
>
> > TIA & TGIF
>
> The easiest way is to use the FPGA editor to modify the
> settings (find your IOB in the "components" list and
> then use "editblock").  Then save the file and just
> re-run bitgen.
>
> Regards,
> Gabor

I have done this when I needed a quick and dirty change to a file
rather than to rerun the entire synthesis. In fact, I needed a series
of variations because I couldn't get Lattice to tell me what the rise
time specs of their parts are. They just kept saying it depends on
the state of the rest of the universe. Certainly they could have
picked a state and spec'd the values the same way other logic parts
do. I just wanted to get a feel for how the rise time varies with the
two output controls, FAST/SLOW and drive current. Turns out it is not
as you might expect.

Rick
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